M5M5V4R08J-12 Mitsumi Electronics, Corp., M5M5V4R08J-12 Datasheet

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M5M5V4R08J-12

Manufacturer Part Number
M5M5V4R08J-12
Description
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
APPLICATION
DESCRIPTION
The M5M5V4R08J is a family of 524288-word by 8-bit static
RAMs, fabricated with the high performance CMOS silicon
gate process and designed for high speed application.
J-lead package(SOJ).
TTL compatible. They include a power down feature as well.
FEATURES
High-speed memory units
The M5M5V4R08J is offered in a 36-pin plastic small outline
These device operate on a single 3.3V supply, and are directly
• Fast access time
• Low power dissipation
• Single +3.3V power supply
• Fully static operation : No clocks, No refresh
• Common data I/O
• Easy memory expansion by S
• Three-state outputs : OR-tie capability
• OE prevents data contention in the I/O bus
• Directly TTL compatible : All inputs and outputs
PRELIMINARY
address
inputs
Notice: This is not a final specification.
Some parametric limits are subject to change
BLOCK DIAGRAM
OE 31
W
A
A
A
A
A
A
A
A
S
A
0
1
2
3
4
6
7
8
5
14
15
16
17
13
1
2
3
4
5
6
M5M5V4R08J-15
M5M5V4R08J-20
M5M5V4R08J-12
Stand by
Active
••••••••••
•••••••
18
A
••••
••••
••••
9
363mW(typ)
3.3mW(typ)
COLUMN INPUT BUFFERS
A
COLUMN I/O CIRCUITS
20 21 22 23 24
12ns(max)
15ns(max)
20ns(max)
10
COLUMN ADDRESS
COLUMN
ADDRESS
MEMORY ARRAY
A
8192 COLUMNS
DECODERS
11
DECODERS
512 ROWS
address inputs
A
12
MITSUBISHI
ELECTRIC
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
A
13
A
PACKAGE
14
data inputs/
outputs
36pin 400mil SOJ
PIN CONFIGURATION (TOP VIEW)
chip select
write control
input
input
data
inputs/
outputs
A
address
inputs
32 33
address
inputs
15
(3.3V)
A
16
(0V)
A
34 35
M5M5V4R08J-12,-15,-20
16
V
GND
DQ
DQ
DQ
A
DQ
CC
17
A
A
A
A
A
W
S
A
A
A
A
A
0
1
2
3
4
5
6
7
8
9
1
2
3
4
Outline
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
36P0K (SOJ)
MITSUBISHI LSIs
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
OE
V
A
A
A
A
A
1997.02.06 Rev.D
NC
DQ
GND
DQ
DQ
NC
A
A
DQ
A
A
CC
14
13
12
11
10
16
15
18
17
11
12
25
26
29
30
10
8
27
28
7
9
5
8
6
7
output enable
input
(0V)
(3.3V)
VCC
GND
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
address
inputs
address
data
inputs/
outputs
inputs
data
inputs/
outputs
1
3
2
4
6
7
5
8
data
inputs/
outputs
(3.3V)
(0V)
1

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M5M5V4R08J-12 Summary of contents

Page 1

... COLUMN DECODERS ADDRESS DECODERS COLUMN INPUT BUFFERS address inputs MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M5V4R08J-12,-15,-20 1997.02.06 Rev ...

Page 2

... I (S) other inputs Output-open(duty 100 ( Vcc 0. (S) other inputs V 0. Vcc-0.2V I MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M5V4R08J-12,-15,-20 Icc Ratings Unit * V -2 1000 - -65 ~ 150 C +10% unless otherwise noted) -5% Limits Typ Max Min 2 ...

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... Z0=50 OUTPUT RL=50 VL=1.5V Fig.1 Output load M5M5V4R08J-12,-15,-20 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM +10% unless otherwise noted) -5% Test Condition ...

Page 6

... Output disable time after OE high t dis (OE) Output enable time after W high (OE) Output enable time after OE low t su (A-WH) Address to W High M5M5V4R08J-12,-15,-20 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM Limits M5M5V4R08J -12 M5M5V4R08J -15 Max Min Min ...

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... Transition is measured ±500mv from steady state voltage with specified loading in Figure 2. Read cycle 3 (Note 1 W=H S=L Note 6. Addresses and S valid prior to OE transition low by (ta(A)-ta(OE)), (ta(S)-ta(OE)) M5M5V4R08J-12,-15,-20 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM (A) tv (A) UNKNOWN (S) (Note 5) ten (S) UNKNOWN ...

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... DATA STABLE t (Note 5) dis (W) t dis (OE) Hi tsu (S) tsu ( ( (Note7) tsu (D) IH DATA STABLE IL t dis (W) ten (S) (Note5) OH (Note5) Hi-Z OL (Note8) MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M5V4R08J-12,-15,-20 (Note7) ten (Note 5) (OE) ten (W) trec (W) (Note7 ...

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