PCK2002DGG Philips Semiconductors, PCK2002DGG Datasheet
PCK2002DGG
Related parts for PCK2002DGG
PCK2002DGG Summary of contents
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PCK2002 2 0–300 MHz I Product data File under Integrated Circuits ICL03 hilips Semiconductors INTEGRATED CIRCUITS C 1:18 clock buffer 2001 Jul 19 ...
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... CONDITIONS 3.465 V CC ORDER CODE 0 to +70 C PCK2002DGG 0 to +70 C PCK2002DL PIN DESCRIPTION PIN I/O NUMBER TYPE Output 13, 14, 17, 18 Output 31, 32, 35, Output 36 40, 41, 44, Output ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer FUNCTION TABLE ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced 0V SYMBOL SYMBOL PARAMETER PARAMETER V DC 3.3 V supply voltage input diode current ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer DC CHARACTERISTICS SYMBOL PARAMETER V HIGH level input voltage IH V LOW level input voltage 3.3V output HIGH voltage 3 3V output HIGH voltage 3.3V output LOW voltage 3 3V output LOW voltage Output HIGH current ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer CONSIDERATIONS has been chosen as the serial bus interface to control the PCK2002. I Unbuffered SDRAM DIMM. All vendors are required to determine the legal issues associated with the manufacture Address assignment: The clock driver in this specification uses the single, 7-bit address shown below. All devices can use the address if only one master clock driver is used in a design ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer Consider the command code and the byte count bytes required as the first two bytes of any transfer. The command code is software programmable via the controller, but will be specified as 0000 0000 in the clock specification. The byte count byte is the number of additional bytes required to transfer, not counting the command code and byte count bytes ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer SERIAL CONFIGURATION MAP The serial bits will be read by the clock buffer in the following order: Byte 0 – Bits Byte 1 – Bits Byte 2 – Bits All unused register bits (Reserved and N/A) should be desined as “ ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer Byte 2: SDRAM Output active/inactive register 1 = enable disable AFFECTED PIN BIT(S) BIT(S) PIN NO. PIN NAME 7 N/A BUF_OUT17 6 12 BUF_OUT16 5 N/A Reserved 4 N/A Reserved 3 N/A Reserved 2 N/A Reserved 1 N/A Reserved 0 N/A Reserved NOTE power up all SDRAM outputs are enabled and active. Program all reserved bits to “0”. ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer AC WAVEFORMS –0 and V are the typical output voltage drop that occur with the OL OH output load BUF_IN INPUT t t PLH PHL V M BUF_OUT Figure 1 ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm 2001 Jul 19 10 Product data PCK2002 SOT362-1 ...
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... Philips Semiconductors 2 0–300 MHz I C 1:18 clock buffer SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 2001 Jul 19 11 Product data PCK2002 SOT370-1 ...
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... Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no ...