KM62256CLTG-7 Samsung, KM62256CLTG-7 Datasheet

no-image

KM62256CLTG-7

Manufacturer Part Number
KM62256CLTG-7
Description
32Kx8 bit low power CMOS static RAM, 70ns, low power
Manufacturer
Samsung
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KM62256CLTG-7L
Quantity:
2 000
I/O
I/O
I/O
V
A
A
A
A
A
A
A
A
A
A
SS
14
12
7
6
5
4
3
2
1
0
1
2
3
PIN DESCRIPTION
KM62256C Family
PRODUCT FAMILY
* The parameter is measured with 30pF test load.
32Kx8 bit Low Power CMOS Static RAM
FEATURES
¡Ü
¡Ü
¡Ü
¡Ü
¡Ü
¡Ü
KM62256CL
KM62256CL-L
KM62256CLE
KM62256CLE-L
KM62256CLI
KM62256CLI-L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Process Technology : 0.7
Organization : 32Kx8
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : JEDEC Standard
28-DIP, 28-SOP, 28-TSOP I -Forward/Reverse
Power Supply Voltage : Single 5V ¡¾ 10%
28-SOP
28-DIP
Product
Family
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
WE
A
A
A
A
OE
A
CS
I/O
I/O
I/O
I/O
I/O
CC
13
8
9
11
10
8
7
6
5
4
§-
WE
WE
OE
V
V
A
A
A
A
OE
A
A
A
A
A
A
A
A
A
A
A
CC
A
A
A
A
A
CC
A
A
11
13
14
12
12
14
13
11
Commercial (0~70 ¡É )
CMOS
Extended (-25~85 ¡É )
9
8
7
6
5
4
3
3
4
5
6
7
8
9
Industrial (-40~85 ¡É )
Temperature.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Operating
Type I - Forward
Type I - Reverse
28-TSOP
28-TSOP
45*/55/70ns
70/100ns
70/100ns
Speed
(ns)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A
CS
I/O
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
A
A
A
A
A
A
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
I/O
CS
A
10
SS
0
1
2
2
1
0
SS
10
GENERAL DESCRIPTION
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
CMOS process technology. The family can support various
operating temperature ranges and has various package types
for user flexibility of system design. The family also support low
data retention voltage for battery back-up operation with low
data retention current.
The KM62256C family is fabricated by SAMSUNG's advanced
28-DIP, 28-SOP
28-TSOP I R/F
28-SOP
28-TSOP I R/F
28-SOP
28-TSOP I R/F
FUNCTIONAL BLOCK DIAGRAM
PKG Type
A
WE
CS
OE
I/O
Vcc
Vss
A
A
A
0
~A
3
12~14
1
0
NameName
~I/O
~A
~A
14
8,
2,
8
I/O
A
9~11
1
~
8
Y-Decoder
(I
I/O Buffer
Standby
SB1
100
100
100
Cell
Array
Function
Address Inputs
Write Enable Input
Chip Select Input
Output Enable Input
Data Inputs/Outputs
Power(5V)
Ground
20
50
50
Power Dissipation
, Max)
PRELIMINARY
§Ë
§Ë
§Ë
§Ë
§Ë
§Ë
CMOS SRAM
Operating
Revision 3.0
70mA
(Icc
April 1996
CS
WE,OE
2
)

Related parts for KM62256CLTG-7

KM62256CLTG-7 Summary of contents

Page 1

... GENERAL DESCRIPTION The KM62256C family is fabricated by SAMSUNG's advanced CMOS process technology. The family can support various operating temperature ranges and has various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operation with low data retention current ...

Page 2

... KM62256CLTG-4 28-TSOP F, 45ns, L-pwr KM62256CLTG-4L 28-TSOP F, 45ns, LL-pwr KM62256CLTG-5 28-TSOP F, 55ns, L-pwr KM62256CLTG-5L 28-TSOP F, 55ns, LL-pwr KM62256CLTG-7 28-TSOP F, 70ns, L-pwr KM62256CLTG-7L 28-TSOP F, 70ns, LL-pwr KM62256CLRG-4 28-TSOP R, 45ns, L-pwr KM62256CLRG-4L 28-TSOP R, 45ns, LL-pwr KM62256CLRG-5 28-TSOP R, 55ns, L-pwr KM62256CLRG-5L 28-TSOP R, 55ns, LL-pwr KM62256CLRG-7 ...

Page 3

KM62256C Family ABSOLUTE MAXIMUM RATINGS Item Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Operating Temperature Soldering temperature and time * Stresses greater than those listed under "Absolute Maximum Ratings" ...

Page 4

KM62256C Family DC AND OPERATING CHARACTERISTICS Item Input leakage current Output leakage current Operating power supply current Average operating current Output low voltage Output high voltage Standby Current(TTL) KM62256CL KM62256CL-L Standby Current KM62256CLE (CMOS) KM62256CLE-L KM62256CLI KM62256CLI ...

Page 5

KM62256C Family TEST CONDITIONS (2. Temperature and Vcc Conditions) Product Family Temperature KM62256CL/L-L KM62256CLE/LE-L KM62256CLI/LI-L * The parameter is measured with 30pF test load PARAMETER LIST FOR EACH SPEED BIN Parameter List Read Read cycle time Address access time Chip ...

Page 6

KM62256C Family DATA RETENTION CHARACTERISTICS Item Vcc for data retention V DR Data retention current I DR Data retention set-up time t SDR Recovery time t RDR * 1) Commercial Product : Ta ¡É , unless otherwise specified ...

Page 7

KM62256C Family TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE (1) ( CS=OE Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS OE Data out High-Z NOTES (READ CYCLE ...

Page 8

KM62256C Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS WE Data in Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE Data in Data out NOTES (WRITE CYCLE write occurs during the overlap( at the earliest ...

Page 9

KM62256C Family PACKAGE DIMENSIONS 28 PIN DUAL INLINE PACKAGE(600mil) #28 ¡¾ 13.60 0.20 0.535 ¡¾ 0.008 #1 1. 0.065 28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil) # 0.035 36.72 MAX 1.446 ¡¾ 36.32 0.20 ¡¾ ...

Page 10

KM62256C Family PACKAGE DIMENSIONS 28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.55 #14 0.0217 28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4R) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #14 0.55 ...

Related keywords