DS90CF563MTD National Semiconductor, DS90CF563MTD Datasheet
DS90CF563MTD
Available stocks
Related parts for DS90CF563MTD
DS90CF563MTD Summary of contents
Page 1
... LCD panel controllers. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces. Block Diagrams DS90CF563 Order Number DS90CF563MTD See NS Package Number MTD48 TRI-STATE ® registered trademark of National Semiconductor Corporation. ...
Page 2
Block Diagrams (Continued) www.national.com DS012615-3 2 ...
Page 3
... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( CMOS/TTL Input Voltage −0. CMOS/TTL Output Voltage −0. LVDS Receiver Input Voltage −0. LVDS Driver Output Voltage − ...
Page 4
Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified Symbol Parameter TRANSMITTER SUPPLY CURRENT I Transmitter Supply Current, CCTZ Power Down RECEIVER SUPPLY CURRENT I Receiver Supply Current, CCRW Worst Case I Receiver Supply Current, CCRG 16 ...
Page 5
Receiver Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol CLHT CMOS/TTL Low-to-High Transition Time ( Figure 4 ) CMOS/TTL High-to-Low Transition Time ( Figure 4 ) CHLT RCOP RxCLK OUT Period RCOH RxCLK OUT High ...
Page 6
AC Timing Diagrams (Continued) Note 7: The worst case test pattern produces a maximum toggling of digital circuits, LVDS I/O and CMOS/TTL I/O. Note 8: The 16 grayscale test pattern tests device power consumption for a “typical” LCD display pattern. ...
Page 7
AC Timing Diagrams (Continued) Note: Measurements at Vdiff = 0V Note: TCSS measured between earliest and latest LVDS edges. Note: TxCLK Differential High Low Edge FIGURE 6. DS90CF563 (Transmitter) Channel-to-Channel Skew and Pulse Width FIGURE 7. DS90CF563 (Transmitter) Setup/Hold and ...
Page 8
AC Timing Diagrams (Continued) FIGURE 10. DS90CF564 (Receiver) Clock In to Clock Out Delay FIGURE 11. DS90CF563 (Transmitter) Phase Lock Loop Set Time FIGURE 12. DS90CF564 (Receiver) Phase Lock Loop Set Time www.national.com DS012615-13 DS012615-14 DS012615-15 8 ...
Page 9
AC Timing Diagrams (Continued) FIGURE 13. Transmitter LVDS Output Pulse Position Measurement SW — Setup and Hold Time (Internal Data Sampling Window) TCCS — Transmitter Output Skew RSKM Cable Skew (type, length) + Source Clock Jitter (cycle to cycle) Cable ...
Page 10
AC Timing Diagrams (Continued) FIGURE 16. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs (DS90CF563) DS90CF563 Pin Descriptions — FPD Link Transmitter Pin Name I/O No. TxIN I 21 TTL level input. This includes: 6 Red, 6 Green, 6 ...
Page 11
DS90CF563 Pin Descriptions — FPD Link Transmitter Pin Name I/O No. PLL GND I 2 Ground pins for PLL LVDS Power supply pin for LVDS outputs CC LVDS GND I 3 Ground pins for LVDS outputs DS90CF564 ...
Page 12
... National Semiconductor Asia Pacific Customer Fax: +49 (0) 1 80-530 85 86 Response Group Email: europe.support@nsc.com Tel: 65-2544466 Fax: 65-2504466 Tel: +49 (0) 1 80-532 78 32 Email: sea.support@nsc.com Tel: +49 (0) 1 80-534 16 80 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 ...