K6R4016C1D-TI10 Samsung, K6R4016C1D-TI10 Datasheet

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K6R4016C1D-TI10

Manufacturer Part Number
K6R4016C1D-TI10
Description
K6R4016C1D-TI10256Kx16 Bit High Speed Static RAM(5.0V Operating). Operated at Commercial and Industrial Temperature Ranges.
Manufacturer
Samsung
Datasheet

Specifications of K6R4016C1D-TI10

Case
TSOP

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Part Number:
K6R4016C1D-TI10
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K6R4016C1D
Document Title
Revision History
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to c hange the
Rev No.
Rev. 0.0
Rev. 0.1
Rev. 0.2
Rev. 0.3
Rev. 0.4
Rev. 1.0
Rev. 2.0
256Kx16 Bit High Speed Static RAM(5.0V Operating).
Operated at Commercial and Industrial Temperature Ranges.
History
Initial release with Preliminary.
Package dimension modify on page 11.
Change Icc, Isb and Isb1
1. Correct AC parameters : Read & Write Cycle
2. Corrrect Power part : Delete "P-Industrial,Low Power" part
3. Delete Data Retention Characteristics
1. Delete 15ns speed bin.
2. Change Icc for Industrial mode.
1. Final datasheet release.
2. Delete 12ns speed bin.
1. Add the Lead Free Package type.
I
CC(Commercial)
I
I
CC(Industrial)
CC(Industrial)
I
SB1(Normal)
Item
Item
I
SB
10ns
12ns
15ns
10ns
12ns
15ns
10ns
12ns
Previous
Previous
115mA
100mA
85mA
75mA
90mA
80mA
70mA
85mA
30mA
10mA
PRELIMPreliminaryPPPPPPPPPINARY
- 1 -
Current
Current
75mA
65mA
65mA
55mA
45mA
85mA
75mA
65mA
20mA
5mA
September. 7. 2001
Septermber.28. 2001
November, 3, 2001
November, 23, 2001
December, 18, 2001
July, 09, 2002
June. 20, 2003
Draft Data
CMOS SRAM
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Final
Final
Remark
June 2003
Rev 2.0

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K6R4016C1D-TI10 Summary of contents

Page 1

... K6R4016C1D Document Title 256Kx16 Bit High Speed Static RAM(5.0V Operating). Operated at Commercial and Industrial Temperature Ranges. Revision History Rev No. History Rev. 0.0 Initial release with Preliminary. Rev. 0.1 Package dimension modify on page 11. Rev. 0.2 Change Icc, Isb and Isb1 Item I CC(Commercial) I CC(Industrial SB1(Normal) Rev. 0.3 1. Correct AC parameters : Read & ...

Page 2

... K6R4016C1D 4Mb Async. Fast SRAM Ordering Information Org. Part Number K6R4004C1D-J(K)C( K6R4004V1D-J(K)C(I) 08/10 K6R4008C1D-J(K,T,U)C(I) 10 512K x8 K6R4008V1D-J(K,T,U)C(I) 08/10 K6R4016C1D-J(K,T,U,E)C(I) 10 256K x16 K6R4016V1D-J(K,T,U,E)C(I,L,P) 08/10 PRELIMPreliminaryPPPPPPPPPINARY VDD(V) Speed ( ns ) PKG 32-SOJ K : 32-SOJ(LF) 3.3 8/ 36-SOJ K : 36-SOJ(LF 44-TSOP2 3.3 8/ 44-TSOP2(LF 44-SOJ K : 44-SOJ(LF 44-TSOP2 U: 44-TSOP2(LF) 3.3 8/ 48-TBGA - 2 - CMOS SRAM Temp. & Power ...

Page 3

... The K6R4016C1D is a 4,194,304-bit high-speed Static Ran- dom Access Memory organized as 262,144 words by 16 bits. The K6R4016C1D uses 16 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control(UB, LB) ...

Page 4

... K6R4016C1D PIN CONFIGURATION (Top View SOJ/ I TSOP2 Vcc 11 Vss PIN FUNCTION Pin Name Pin Function Address Inputs ...

Page 5

... K6R4016C1D RECOMMENDED DC OPERATING CONDITIONS* Parameter Supply Voltage Ground Input High Voltage Input Low Voltage * The above parameters are also guaranteed at industrial temperature range (Min) = -2.0V a.c(Pulse Width 8ns) for I IL *** V (Max 2.0V a.c (Pulse Width AND OPERATING CHARACTERISTICS* Parameter Symbol Input Leakage Current ...

Page 6

... Chip Selection to Power DownTime * The above parameters are also guaranteed at industrial temperature range. PRELIMPreliminaryPPPPPPPPPINARY = =5.0V 10%, unless otherwise noted.) CC Output Loads(B) for 1.5V L 30pF* * Including Scope and Jig Capacitance K6R4016C1D-10 Symbol Min ...

Page 7

... End of Write to Output Low The above parameters are also guaranteed at industrial temperature range. TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Valid Data TIMING WAVEFORM OF READ CYCLE(2) Address CS UB Data out High-Z PRELIMPreliminaryPPPPPPPPPINARY K6R4016C1D-10 Min ...

Page 8

... K6R4016C1D NOTES (READ CYCLE high for read cycle. 2. All read cycle timing is referenced from the last valid address to the first transition address and t are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V ...

Page 9

... K6R4016C1D TIMING WAVEFORM OF WRITE CYCLE(3) Address CS UB High-Z Data in High-Z Data out TIMING WAVEFORM OF WRITE CYCLE(4) Address CS UB High-Z Data in High-Z Data out NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address. ...

Page 10

... K6R4016C1D FUNCTIONAL DESCRIPTION means Don t Care. PRELIMPreliminaryPPPPPPPPPINARY UB Mode I/O ~I Not Select High-Z X Output Disable High Read D OUT L High OUT H Write D L High CMOS SRAM ...

Page 11

... K6R4016C1D PACKAGE DIMENSIONS 44-SOJ-400 #44 11.18 0.12 0.440 0.005 #1 +0.10 0.43 -0.05 0.017 +0.004 0. 0.002 0.0375 44-TSOP2-400BF #44 #1 18.81 0.741 18.41 0.725 0.10 0.30 0.805 0. 0.004 0.032 0.012 0.002 PRELIMPreliminaryPPPPPPPPPINARY 28.98 MAX 1.141 25.58 0.12 1.125 0.005 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 #23 11.76 0.463 #22 MAX 0.10 0.004 1.00 0.039 0.05 MIN 0.80 0.002 0.0315 - 11 CMOS SRAM Units:millimeters/Inches #23 #22 1. 0.047 3.76 1.27 MAX ...

Page 12

... K6R4016C1D PACKAGE DIMENSIONS Top View B #A1 Side View D Min 6. 8. 0. PRELIMPreliminaryPPPPPPPPPINARY Typ Max 0.75 - 7.00 7.10 3.75 - 9.00 9.10 5.25 - 0.45 0.50 0.90 1.00 0.55 - 0.35 0. CMOS SRAM Units : millimeter. Bottom View B 0. B/2 Detail Notes. 1. Bump counts: 48(8row x 6column) 2. Bump pitch : (x,y)=(0.75 x 0.75)(typ.) 3 ...

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