LH28F128BFHBD-PWTLZ1 Sharp, LH28F128BFHBD-PWTLZ1 Datasheet
LH28F128BFHBD-PWTLZ1
Available stocks
Related parts for LH28F128BFHBD-PWTLZ1
LH28F128BFHBD-PWTLZ1 Summary of contents
Page 1
... Flash Memory LH28F128BFHBD-PWTLZ1 Date Feb. 4. 2003 ...
Page 2
Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. When using the products covered herein, please observe ...
Page 3
CSP Pinout ............................... 3 Pin Descriptions.......................................................... 4 Simultaneous Operation Modes Allowed with Eight Planes ................................. 5 Memory Map .............................................................. 6 Identifier Codes and OTP Address for Read Operation ............................................. 8 Identifier Codes and OTP Address for Read ...
Page 4
... Fast program capability is provided through the use of high speed Page Buffer Program. Special OTP (One Time Program) block provides an area to store permanent code such as a unique number. * ETOX is a trademark of Intel Corporation. LHF12FZ1 LH28F128BFHBD-PWTLZ1 128Mbit (8Mbit 16) Flexible Blocking Architecture • Sixteen 4K-word Parameter Blocks • ...
Page 5
WE# RY/BY# D GND RST ...
Page 6
Symbol Type A -A ADDRESS INPUTS: Inputs for addresses. A INPUT 0 21 DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User Interface) write cycles, outputs data during memory array, status register, query code, INPUT/ DQ -DQ identifier code ...
Page 7
Table 2. Simultaneous Operation Modes Allowed with Eight Planes IF ONE Read Read PARTITION IS: Array ID/OTP Read Array X X Read ID/OTP X X Read Status X X Read Query X X Word Program X X Page Buffer X ...
Page 8
Selected by BE #=V (Bank BLOCK NUMBER ADDRESS RANGE 134 3F8000H - 3FFFFFH 32K-WORD 133 3F0000H - 3F7FFFH 32K-WORD 132 3E8000H - 3EFFFFH 32K-WORD 131 3E0000H - 3E7FFFH 32K-WORD 130 32K-WORD 3D8000H - 3DFFFFH 129 32K-WORD 3D0000H ...
Page 9
BLOCK NUMBER ADDRESS RANGE 3FF000H - 3FFFFFH 134 4K-WORD 3FE000H - 3FEFFFH 133 4K-WORD 3FD000H - 3FDFFFH 132 4K-WORD 3FC000H - 3FCFFFH 131 4K-WORD 3FB000H - 3FBFFFH 130 4K-WORD 3FA000H - 3FAFFFH 129 4K-WORD 3F9000H - 3F9FFFH 128 4K-WORD 3F8000H ...
Page 10
Table 3. Identifier Codes and OTP Address for Read Operation Manufacturer Code Manufacturer Code Device Code Device Code Block Lock Configuration Block is Unlocked Code Block is Locked Block is not Locked-Down Block is Locked-Down Device Configuration Code Partition Configuration ...
Page 11
Customer Programmable Area Lock Bit (DQ Factory Programmed Area Lock Bit (DQ Figure 3. OTP Block Address Map for OTP Program (The area outside 80H~88H cannot be used.) NOTE: 1. ...
Page 12
Mode Notes Bank 0 Bank 1 Read Array Inhibited Output Disable Bank 0 Bank 1 Standby Bank 0, 1 Reset Bank 0 Read Identifier Bank 1 6,9 Codes/OTP Inhibited Bank 0 Bank 1 Read Query 6,7 Inhibited Bank 0 4,5, ...
Page 13
Command Read Array Read Identifier Codes/OTP Read Query Read Status Register Clear Status Register Block Erase Bank Erase Program Page Buffer Program Block Erase and (Page Buffer) Program Suspend Block Erase and (Page Buffer) Program Resume Set Block Lock Bit ...
Page 14
... When the data within OTP block is read, BE Program command with 12. Commands other than those shown above are reserved by SHARP for future device implementations and should not be used. LHF12FZ1 # must When the OTP program operation is executed, write the OTP ...
Page 15
Table 7. Functions of Block Lock Current State (1) State WP [000 ( [001] [011 [100 ( [101] ( [110] [111 NOTES ...
Page 16
Table 9. Block Locking State Transitions upon WP# Transition Current State Previous State State - [000] - [001] (2) [110] [011] (2) Other than [110] - [100] - [101] - [110] - [111] NOTES: 1. "WP#=0 1" means that WP# ...
Page 17
WSMS BESS BEFCES 7 6 SR.15 - SR.8 = RESERVED FOR FUTURE ENHANCEMENTS (R) SR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy SR.6 = BLOCK ERASE SUSPEND STATUS (BESS ...
Page 18
SMS XSR.15-8 = RESERVED FOR FUTURE ENHANCEMENTS (R) XSR.7 = STATE MACHINE STATUS (SMS Page Buffer Program available 0 = Page Buffer Program not available XSR.6-0 = RESERVED FOR FUTURE ENHANCEMENTS ...
Page 19
PCR.15-11 = RESERVED FOR FUTURE ENHANCEMENTS (R) PCR.10-8 = PARTITION CONFIGURATION (PC2-0) 000 = No partitioning. Dual Work is not allowed. 001 = Plane1-3 are merged into one partition. (default in Bank ...
Page 20
Electrical Specifications 1.1 Absolute Maximum Ratings Operating Temperature During Read, Erase and Program ...- +85 C Storage Temperature During under Bias............................... - +85 C During non Bias................................ - +125 C Voltage On Any ...
Page 21
Capacitance ( f=1MHz) A Parameter Symbol Input Capacitance Output Capacitance NOTE: 1. Sampled, not 100% tested. 1.2.2 AC Input/Output Test Conditions V CC INPUT 0.0 AC test inputs are driven at V Input timing begins, ...
Page 22
DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CCS Automatic Power Savings Current CCAS Reset Power-Down Current CCD CC Average V Read CC ...
Page 23
Symbol Parameter V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH V Lockout during Normal PP V PPLK Operations V during Block Erase, Bank Erase (Page Buffer) ...
Page 24
AC Characteristics - Read-Only Operations Symbol t Read Cycle Time AVAV t Address to Output Delay AVQV Output Delay ELQV Page Address Access Time APA t OE# to Output ...
Page 25
(A) (A) 21-0 20 EHEL CE OE# ( (W) WE ...
Page 26
(A) (A) 21-3 20 (A) 2 CE OE# ( WE# ...
Page 27
AC Characteristics - Write Operations Symbol t Write Cycle Time AVAV RST# High Recovery to WE# (BE PHWL PHEL ELWL WLEL Going Low WE# (BE ...
Page 28
NOTE (A) (A) 20-0 21 CE ELWL WLEL V IH OE# ( PHWL PHEL ...
Page 29
Reset Operations V IH RST# ( High (D/Q) 15 RST# ( High (D/Q) 15 (min GND V ...
Page 30
Block Erase, Bank Erase, (Page Buffer) Program and OTP Program Performance Symbol Parameter 4K-Word Parameter Block t WPB Program Time 32K-Word Main Block t WMB Program Time t / WHQV1 Word Program Time t EHQV1 t / WHOV1 OTP ...
Page 31
... Related Document Information Document No. FUM00701 NOTE: 1. International customers should contact their local SHARP or distribution sales offices. LHF12FZ1 (1) Document Name LH28F128BF series Appendix 29 Rev. 2.44 ...
Page 32
A-1 RECOMMENDED OPERATING CONDITIONS A-1.1 At Device Power-Up AC timing illustrated in Figure A-1 is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not operate ...
Page 33
A-1.1.1 Rise and Fall Time Symbol t V Rise Time Input Signal Rise Time R t Input Signal Fall Time F NOTES: 1. Sampled, not 100% tested. 2. This specification is applied for not only the device ...
Page 34
A-1.2 Glitch Noises Do not input the glitch noises which are below V as shown in Figure A-2 (b). The acceptable glitch noises are illustrated in Figure A-2 (a). Input Signal V (Min (Max.) IL Input Signal (a) ...
Page 35
... A-2 RELATED DOCUMENT INFORMATION Document No. AP-001-SD-E AP-006-PT-E AP-007-SW-E NOTE: 1. International customers should contact their local SHARP or distribution sales office. (1) Document Name Flash Memory Family Software Drivers Data Protection Method of SHARP Flash Memory RP#, V Electric Potential Switching Circuit PP iv Rev. 1.10 ...
Page 36
A-3 STATUS REGISTER READ OPERATIONS If AC timing for reading the status register described in specifications is not satisfied, a system processor can check the status register bit SR.15 instead of SR.7 to determine when the erase or program operation ...