LT5554IUH#TRPBF Linear Technology, LT5554IUH#TRPBF Datasheet - Page 20
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LT5554IUH#TRPBF
Manufacturer Part Number
LT5554IUH#TRPBF
Description
IC VGA DIG CONTROL 32-QFN
Manufacturer
Linear Technology
Datasheet
1.LT5554IUHPBF.pdf
(32 pages)
Specifications of LT5554IUH#TRPBF
Applications
Variable Gain (VGA)
Number Of Circuits
1
-3db Bandwidth
1GHz
Current - Supply
200mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LT5554
All seven PGx gain control inputs and STROBE input can
be confi gured as DC-coupled or ac-coupled. Accordingly,
there are two basic equivalent schematics (shown in Figures
8 and 9) depending on MODE input choice (Table1).
Each PGx input circuit shown in Figures 8 and 9 is fol-
lowed by a transparent latch controlled by the STROBE
input level (Table 1).
The DC-coupled interface is shown in Figure 8. DC levels for
PGx inputs and STROBE input are V
APPLICATIONS INFORMATION
20
Figure 8. DC-Coupled PGx and STROBE Equivalent Inputs
(Simplifi ed Schematic)
Figure 9. AC-Coupled PGx and STROBE Equivalent Inputs
(Simplifi ed Schematic)
INPUT
DC-COUPLED
INPUT
AC-COUPLED
20k
2pF
20k
2pF
R1
C1
R1
C1
I3
I2
1.5k
1.5k
IDC
IDC
R2
R2
200μA
200μA
Q2
Q2
I1
I1
1.5k
1.5k
R3
R3
IDC
IDC
Q3
Q3
IL
<0.6V, V
Q1
Q1
20k
20k
R4
R4
5554 F08
5554 F09
V
OUT
OUT
V
OUT
OUT
CC
CC
+
–
+
–
IH
V1
1.4V
V1
1.4V
>2.2V.
The AC-coupled interface is shown in Figure 9. The PGx
inputs and STROBE input state is decided by a signal
transition rather than signal level.
A HIGH-state is set by positive transitions. A LOW-state is
set by negative transitions. The PGx and STROBE inputs
appear as capacitive coupled inputs. The DC voltage (0V
to V
shifted to the internal 1.4V level by the additional circuit
shown in Figure 9. Each PGx and STROBE input has an
independent shift circuit such that each input can have a
different DC voltage.
Each PGx input has a parallel R-C (R1 = 20k, C1 = 2pF)
with a 40ns time constant. The STROBE input circuit has
R1 = 20k C1 = 3pF and 60ns time constant. An minimum
amplitude of 0.6V
inputs to an appropriate state when the signal period is
less than input time constant. The circuit shown in Figure 8
converts the single-ended external signal to an internal
differential signal. Consequently, when the input is idle for
more than the input time constant, a 0.3V
will still trigger the gain control state change. All control
inputs have 200mV hysteresis to insure stable logic levels
when the input noise level is less than 100mV
For transparent latch control, the amplifi er gain will be
updated directly with any PGx input state changes. If
different PGx inputs have an (external) time skew greater
than 1ns, then a noticeable amplifi er output glitch can
occur. The strobe latch control is recommended to avoid
this amplifi er output glitch.
It is not necessary to double buffer the PGx inputs since
the LT5554 has good internal isolation from the PGx inputs
to the amplifi er output to any type of external gain control
circuit without external components.
If LT5554 is powered up or enabled in latch mode, the
LT5554 gain initial gain is indeterminate. If the minimum
gain state is desired at power up, it is recommended to
set the transparent-mode with all PGx inputs low.
CC
range) presented on any PGx or STROBE input is
P-P
is required to trip the PGx and STROBE
P-P
P-P
transition
.
5554f