SP791CP Sipex Corporation, SP791CP Datasheet
SP791CP
Related parts for SP791CP
SP791CP Summary of contents
Page 1
... SP791 Low Power Microprocessor Supervisory with Battery Switch-Over with Battery Switch-Over 15 RESET Vcc BATT 4.65V WATCHDOG TIMER + GND WDO WDPO 1 SP791 LOWLINE 150mV _ 5 BATT OUT CHIP-ENABLE OUTPUT CONTROL 12 CE OUT © Copyright 2000 Sipex Corporation ...
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... BATT OUT V =4.5V =3.0V =4.5V, I =20mA BATT OUT V =2.8V, I =10mA BATT OUT V =2.0V, I =5mA BATT OUT V =4.5V BATT V =2.8V BATT V =2.0V BATT V > V – BATT V < V – 1. 2.8V CC BATT BATT V + 0.2V < V BATT CC Power up Power down Peak to Peak © Copyright 2000 Sipex Corporation ...
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... 3.2 mA 4.25V SINK 1.6mA SOURCE CC Output source current I = 3.2mA 4.25V SINK SOURCE CC Output source current I = 3.2mA SINK I = 500 SOURCE CC Output source currrent I = 3.2mA SINK I = 1mA SOURCE Output source current © Copyright 2000 Sipex Corporation ...
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... Output source current V = 15mV 15mV OD Disabled mode Enabled mode Disabled mode, CE OUT = 0V 50 source impedance driver 50pF LOAD 100 A CC OUT 2.8V BATT OUT Power down /2. CE OUT CC OUT © Copyright 2000 Sipex Corporation = CC . ...
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... OUT goes low only when CE is low IN is above the reset threshold will OUT goes high, IN — Chip-Enable Input. The Input IN if not used. OUT falls below the reset thresh- CC crosses the reset threshold on CC © Copyright 2000 Sipex Corporation ...
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... V =0 BATT NO LOAD ON PFO 1.252 1.250 1.248 1.246 -60 - 120 150 Temperature Deg. C Reset Delay vs. Temperature 212 V = Step, CC 210 V =2.8V BATT 208 206 204 202 200 -60 - 120 150 Temperature Deg. C © Copyright 2000 Sipex Corporation ...
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... Slope=0.6 100 10 1 250 300 1 Battery Current vs. V IE+2 IE+1 IE+0 IE-1 IE-2 IE-3 IE-4 IE-5 IE-6 IE-7 IE-8 100 .0000 7 Watchdog Timeout vs. Timing Capacitor =5V =2. 100 Timing Capacitor (nF vs. CC OUT Output Current =0V 10 100 1000 IOUT (mA) Voltage CC V =2.8V BATT 5.000 V (0.5V/div) CC © Copyright 2000 Sipex Corporation ...
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... The propagation delay from asserting MR to RESET being asserted is 7us typical. Pulsing 8 CMOS RAM AO-A15 P I/O NMI RESET INT MR * Corporation * Manually resets Provides for power- Monitors P activity Switches over from falls below the reset thresh BATT as shown in Fig- OUT © Copyright 2000 Sipex Corporation ...
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... RESET assertion. 9 100ns MIN 1.6sec 70ns P POWER P RESET I/O NMI INTERRUPT 2 TWO CONSECUTIVE 1 WATCHDOG FAULT INDICATIONS – 0.5V. When no backup bat- CC (ON) and the saturation volt- DS pull-down resistor ensures the external pull-down resistor, the between 0V and 5.5V. RESET will © Copyright 2000 Sipex Corporation ...
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... CE transitions. When reset is asserted, this path becomes dis- abled, preventing erroneous data from corrupt- ing the CMOS RAM. The SP791 uses a series transmission gate from Therefore, OUT since, in the ab- CC selects the in- OUT OUT © Copyright 2000 Sipex Corporation ...
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... OUT and use a low output-impedance in series with the source . In the disabled mode, the actively OUT . This source turns off when the OUT +5V Vcc Corporation OUT 50pF C LOAD GND © Copyright 2000 Sipex Corporation OUT ...
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... PFO is actively pulled to V necting PFI through a voltage divider to an un- regulated supply allows PFO to generate an NMI as the unregulated power begins to fall (see Figure 9b POWER POWER TO CMOS RAM P NMI P POWER POWER TO CMOS RAM P RESET NMI I/O LINE IH . Con- OUT © Copyright 2000 Sipex Corporation IL to ...
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... F capacitor. BATT , BATT BATT OUT 0.1 F Corporation and V -to-V Switch CC BATT OUT ) should connects similar BATT ) supplies all OUT voltage in their high OUT voltage. At the maxi- CC will typi- OUT . V should be CC OUT © Copyright 2000 Sipex Corporation OUT ...
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... V V BATT OUT Corporation GND 4 . Typical supply while only CC is typically CC All circuitry is BATT. , and the supply BATT is less than CC supply BATT , BATT BATT , current flows to VOUT and CC until the voltage BATT . CC © Copyright 2000 Sipex Corporation ...
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... The backup battery may be disconnected while V is above the reset threshold. No precautions CC are necessary to avoid spurious reset pulses. 15 +5V Vcc PFI C1* Corporation PFO GND * OPTIONAL FOR ADDITIONAL NOISE REJECTION TRIP ( ) 1. 1.25 1. © Copyright 2000 Sipex Corporation ...
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... 0.01V/ s. The falls exponentially, which more than sat- CC isfies the maximum fall-time requirement. 16 START SET WDI LOW SUBROUTINE SET WDI HIGH RETURN END fall rate decreases with time CC © Copyright 2000 Sipex Corporation ...
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... Copyright 2000 Sipex Corporation ...
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... BSC) (1.270 BSC) 0.228/0.244 0.228/0.244 (5.801/6.198) (5.801/6.198) 0.010/0.020 0.010/0.020 (0.254/0.498) (0.254/0.498) 0.016/0.050 0.016/0.050 (0.406/1.270) (0.406/1.270) 0°/8° 0°/8° (0°/8°) (0°/8°) 18 Ø © Copyright 2000 Sipex Corporation ...
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... Model SP791CP ................................................................................... 0˚C to +70˚C .............................................................................. 16-pin, Plastic DIP SP791CN ................................................................................... 0˚C to +70˚C .......................................................................... 16-pin, Narrow SOIC SP791EP .................................................................................... -40˚C to +85˚C .......................................................................... 16–pin, Plastic Dip SP791EN ................................................................................... -40˚C to +85˚C ..................................................................... 16–pin, Narrow SOIC Please consult the factory for pricing and availability on a Tape-On-Reel option. ...