SST39SF020-90-4C-NH Silicon Storage Technology, Inc, SST39SF020-90-4C-NH Datasheet

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SST39SF020-90-4C-NH

Manufacturer Part Number
SST39SF020-90-4C-NH
Description
Manufacturer
Silicon Storage Technology, Inc
Datasheet

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SST39SF020-90-4C-NH
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SST39SF020-90-4C-NH
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FEATURES:
• Organized as 256 K X 8
• Single 5.0V Read and Write Operations
• Superior Reliability
• Low Power Consumption:
• Sector Erase Capability
• Fast Read Access Time:
• Latched Address and Data
PRODUCT DESCRIPTION
The SST39SF020 is a 256K x 8 CMOS Multi-Purpose
Flash (MPF) manufactured with SST’s proprietary, high
performance CMOS SuperFlash technology. The split
gate cell design and thick oxide tunneling injector attain
better reliability and manufacturability compared with
alternate approaches. The SST39SF020 device writes
(Program or Erase) with a 5.0V-only power supply. The
SST39SF020 device conforms to JEDEC standard
pinouts for x8 memories.
Featuring high performance byte program, the
SST39SF020 device provides a maximum byte-pro-
gram time of 30 µsec. The entire memory can be erased
and programmed byte by byte typically in 5 seconds,
when using interface features such as Toggle Bit or
Data# Polling to indicate the completion of Program
operation. To protect against inadvertent write, the
SST39SF020 device has on-chip hardware and soft-
ware data protection schemes. Designed, manufac-
tured, and tested for a wide spectrum of applications, the
SST39SF020 device is offered with a guaranteed endur-
ance of 10,000 cycles. Data retention is rated at greater
than 100 years.
The SST39SF020 device is suited for applications that
require convenient and economical updating of program,
configuration, or data memory. For all system applica-
tions, the SST39SF020 device significantly improves
performance and reliability, while lowering power
© 1998 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon storage Technology, Inc.
326-10 12/98
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Current: 20 mA (typical)
– Standby Current: 10 µA (typical)
– Uniform 4 KByte sectors
– 70 and 90 ns
2 Megabit (256K x 8) Multi-Purpose Flash
SST39SF020
1
• Fast Sector Erase and Byte Program:
• Automatic Write Timing
• End of Write Detection
• TTL I/O Compatibility
• JEDEC Standard
• Packages Available
consumption. The SST39SF020 inherently uses less
energy during erase and program than alternative flash
technologies. The total energy consumed is a function of
the applied voltage, current, and time of application.
Since for any given voltage range, the SuperFlash tech-
nology uses less current to program and has a shorter
erase time, the total energy consumed during any Erase
or Program operation is less than alternative flash tech-
nologies. The SST39SF020 device also improves flex-
ibility while lowering the cost for program, data, and
configuration storage applications.
The SuperFlash technology provides fixed Erase and
Program times, independent of the number of endurance
cycles that have occurred. Therefore the system soft-
ware or hardware does not have to be modified or de-
rated as is necessary with alternative flash technologies,
whose erase and program times increase with accumu-
lated endurance cycles.
To meet high density, surface mount requirements, the
SST39SF020 device is offered in 32-pin TSOP and 32-
pin PLCC packages. A 600 mil, 32-pin PDIP is also
available. See Figures 1 and 2 for pinouts.
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the
device using standard microprocessor write sequences.
A command is written by asserting WE# low while
– Sector Erase Time: 7 ms (typical)
– Chip Erase Time: 15 ms (typical)
– Byte Program time: 20 µs (typical)
– Chip Rewrite Time: 5 seconds (typical)
– Toggle Bit
– Data# Polling
– EEPROM Pinouts and command set
– 32-Pin PDIP
– 32-Pin PLCC
– 32-Pin TSOP (8mm x 14mm)
- Internal V
pp
These specifications are subject to change without notice.
Generation
Preliminary Specifications
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SST39SF020-90-4C-NH Summary of contents

Page 1

... Fast Read Access Time: – 70 and 90 ns • Latched Address and Data PRODUCT DESCRIPTION The SST39SF020 is a 256K x 8 CMOS Multi-Purpose Flash (MPF) manufactured with SST’s proprietary, high performance CMOS SuperFlash technology. The split gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches ...

Page 2

... Write cycle, otherwise the rejection is valid. Data# Polling ( When the SST39SF020 device is in the internal Program operation, any attempt to read DQ complement of the true data. Once the Program opera- tion is completed, DQ will produce true data. The device 7 is then ready for the next operation ...

Page 3

... WE# © 1998 Silicon Storage Technology, Inc. or power-down. Any Erase operation requires the inclusion of six byte load sequence. The SST39SF020 device is shipped with the software data protection permanently enabled. See Table 4 for the specific software command codes. During SDP command sequence, invalid com- mands will abort the device to read mode, within TRC ...

Page 4

... A10 CE DQ7 DQ0 13 20 DQ6 19 DQ5 18 DQ4 17 DQ3 PDIP 32- PLCC PIN S AND LEAD Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications 32 OE# 31 A10 30 CE# 29 DQ7 28 DQ6 27 DQ5 DQ4 26 25 DQ3 DQ2 23 22 DQ1 21 DQ0 ...

Page 5

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications ABLE IN ESCRIPTION Symbol Pin Name A -A Address Inputs -DQ Data Input/output 7 0 CE# Chip Enable OE# Output Enable WE# Write Enable Vcc Power Supply Vss Ground NC No Connection ABLE PERATION ODES ELECTION Mode ...

Page 6

... Notes for Software ID Entry Command Sequence 1. With A -A =0; SST Manufacturer Code = BFH, is read with SST39SF020 Device Code = B6H, is read with A 2. The device does not remain in Software Product ID Mode if powered down. © 1998 Silicon Storage Technology, Inc. 2nd Bus 3rd Bus Write Cycle ...

Page 7

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. ...

Page 8

... IMINGS Minimum 100 100 Test Condition I Minimum Specification Units 10,000 Cycles 100 Years 1000 Volts 200 Volts 100 + Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications WE#=V , all I/Os open, IL f=1 Max CC CC OE#= IL, IH Max. ...

Page 9

... Sector Erase SE T Chip Erase SCE (1) Note: This parameter is measured only for initial qualification and after the design or process change that could affect this parameter. © 1998 Silicon Storage Technology, Inc 4.5-5.5V CC SST39SF020-70 SST39SF020-90 Min Max Min ...

Page 10

... INTERNAL PROGRAM OPERATION STARTS 2AAA 5555 ADDR DATA SW1 SW2 BYTE (ADDR/DATA YCLE IMING IAGRAM 10 2 Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications OHZ T CHZ HIGH-Z DATA VALID 326 ILL F03 326 ILL F04.3 326-10 12/98 ...

Page 11

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications 5555 ADDRESS CPH OE# WE# DQ 7-0 AA SW0 IGURE ONTROLLED ROGRAM ADDRESS A 17-0 CE# OE# WE IGURE ATA OLLING IMING © 1998 Silicon Storage Technology, Inc. INTERNAL PROGRAM OPERATION STARTS ...

Page 12

... SIX-BYTE CODE FOR SECTOR ERASE 2AAA 5555 5555 2AAA SW1 SW2 SW3 SW4 RASE IMING IAGRAM 12 2 Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications T OES TWO READ CYCLES WITH SAME OUTPUTS 326 ILL F07 SW5 326 ILL F08.4 326-10 12/98 ...

Page 13

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications 5555 ADDRESS A 17-0 CE# OE WE# DQ 7-0 AA SW0 Note: The device also supports CE# controlled chip erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 10 WE IGURE ONTROLLED HIP Three-byte sequence for ...

Page 14

... SOFTWARE ID EXIT AND RESET 5555 2AAA ADDRESS A 14-0 DQ 7-0 AA CE# OE WE# SW0 F 11 IGURE OFTWARE XIT AND © 1998 Silicon Storage Technology, Inc. 5555 IDA T WHP SW1 SW2 R ESET 14 2 Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications 326 ILL F10.0 326-10 12/98 ...

Page 15

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications V IHT INPUT V ILT AC test inputs are driven at V (2.4 V) for a logic “1” and V IHT for inputs and outputs are V (2.0 V) and 12 IGURE NPUT UTPUT EFERENCE TO DUT F 13 IGURE EST ...

Page 16

... Silicon Storage Technology, Inc. 2 Megabit Multi-Purpose Flash Start Write data: AA Address: 5555 Write data: 55 Address: 2AAA Write data: A0 Address: 5555 Byte Address/Byte Data Wait for end of Program ( Data# Polling bit, or Toggle bit operation) Program Completed 326 ILL F13.3 16 SST39SF020 Preliminary Specifications 326-10 12/98 ...

Page 17

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed F 15 IGURE AIT PTIONS © 1998 Silicon Storage Technology, Inc. Toggle Bit Byte Program/ Sector Erase Initiated Read byte Read same byte No Does DQ 6 match? ...

Page 18

... Reset Command Sequence Write data: AA Address: 5555 Write data: 55 Address: 2AAA Write data: F0 Address: 5555 Wait T IDA Return to normal operation F OMMAND LOWCHARTS 18 2 Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications Write data: F0 Address: XX Wait T IDA Return to normal operation 326 ILL F15.1 326-10 12/98 ...

Page 19

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications Chip Erase Command Sequence Write data: AA Address: 5555 Write data: 55 Address: 2AAA Write data: 80 Address: 5555 Write data: AA Address: 5555 Write data: 55 Address: 2AAA Write data: 10 Address: 5555 Wait T SCE Chip Erase to FFH F 17 ...

Page 20

... Speed SST39SF020 - XXX SST39SF020 Valid combinations SST39SF020-70-4C-WH SST39SF020-70-4C-NH SST39SF020-90-4C-WH SST39SF020-90-4C-NH SST39SF020-90-4C-U1 SST39SF020-70-4I-WH SST39SF020-70-4I-NH SST39SF020-90-4I-WH SST39SF020-90-4I-NH Example : Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...

Page 21

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications PACKAGING DIAGRAMS .065 .075 Base Plane Seating Plane .015 .050 .070 .080 Note: 1. Complies with JEDEC publication 95 MO-015 AP dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (min/max). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches. ...

Page 22

... Complies with JEDEC publication 95 MO-142 BA dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in metric (min/max). 3. Coplanarity: 0.1 (±.05) mm. 32 EAD HIN MALL UTLINE ACKAGE SST ACKAGE ODE © 1998 Silicon Storage Technology, Inc. 2 Megabit Multi-Purpose Flash 8.10 7.90 12.50 12.30 14.20 13.80 (TSOP) 22 SST39SF020 Preliminary Specifications 1.05 0.95 .50 BSC .270 .170 0.15 0.05 32.TSOP-WH-ILL.0 326-10 12/98 ...

Page 23

... Megabit Multi-Purpose Flash SST39SF020 Preliminary Specifications NOTES: © 1998 Silicon Storage Technology, Inc 326-10 12/98 ...

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