TC3299A ETC-unknow, TC3299A Datasheet
TC3299A
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TC3299A Summary of contents
Page 1
... LQFP package. Low Power CMOS process. TC3299A for UTP and AUI interface. General Description The TC3299A (EPCC) is designed to reduce parts count and cost for easy implementation of PCMCIA CSMA/CD Local Area Networks. The TC3299A is the integration of the entire bus interface for ...
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... Pin Configuration ................................................................................................................................................3 1 Pin Description ............................................................................................................................................4 2 Functional Description ................................................................................................................................7 2.1 Power On Configuration....................................................................................................... 9 3 Configuration Registers ............................................................................................................................ 11 3.1 EPCC Core Registers ........................................................................................................ 12 4 Absolute Maximum Ratings......................................................................................................................25 5 Standard Test Conditions..........................................................................................................................25 6 D.C. Characteristics................................................................................................................................25 7 Physical Dimensions.................................................................................................................................26 Confidential. Copyright © 2003, IC Plus Corp. Preliminary Data Sheet 2/26 TC3299A August 27, 20003 TC3299A-DS-R30 ...
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... August 27, 20003 TC3299A-DS-R30 LLED TX- TX+ AGND RX- RX+ AVDD RD- RD+ TD+ TDLY- TD- TDLY+ GND VCC RST SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 WAIT* ...
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... While for Common memory to be accessed, OE* should be set to low state and REG* should set to high state. OE* Attribute Memory Low Common Memory Low Host memory write strobe. After Power reset, if TC3299A is configured to memory write enable, then 2 types of memories are written as defined below: WE* Attribute Memory Low Common Memory ...
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... Link integral LED driver. During Link loss, output high. During loading EEPROM data, used as Serial clock to the EEPROM. When power on reset, This pin must stay at high level. Otherwise, TC3299A will enter internal test mode. Active LED:(default) MA8 is open, when power reset. It functions as active indication LED driver. ...
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... Power Supply Pins 19,36,57,8 VCC 0,98 13,25,37,5 GND 6,94, 100 44 AVDD 47 AGND Confidential. Copyright © 2003, IC Plus Corp. Description + required suggested that a decoupling capacitor be connected between VCC and GND. Power for analog Phase Lock Loop circuit of EPCC. 6/26 TC3299A Preliminary Data Sheet August 27, 20003 TC3299A-DS-R30 ...
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... The EPCC controller is a highly integrated jumperless configurable Ethernet controller. It integrates the function of the following blocks: TC3299A Ethernet Controller Core and Media Access Control logic. 1. PCMCIA 2.0 Bus interface containing all logics require to connect the TC3299A core to a packet buffer RAM and the PCMCIA Bus. ...
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... PCMCIA CIS Structures & Decode Function: The TC3299A supports access attribute memory. Attribute memory is defined by the PCMCIA standard to be comprised of the card's information structure and four 8-bits Card Configuration Registers. These four registers are contained in the TC3299A. The attribute Memory (only even address can be accessed) map for a PCMCIA card is shown below ...
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... PJ1 MA12 isn't pulled low during power on reset, despite of the value of PJ1,0, TC3299A response to I/O access at the I/O base address 300h, 320h, 340h, 360h. otherwise, I/O base Map as below: PJ1 PJ0 PJ1,0 : Reserved Configuration Registers 1 ® (CCR1 IREQ ...
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... MA11 is pulled low during power on reset and this bit is set high. TC3299A can work at NE2000's 8-bit mode. Storing and Loading Configuration from EEPROM: If the EECONFIG is set high (MA9 pull low) during boot up, the EPCC Controller's configuration is determined by the EEPROM, before the PROM data is read The configuration data is stored within the address 0EH of the EEPROM's address space ...
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... In auto detect mode. For TC3299A, MA10 open for 10BaseT or 10Base5 auto-detect. GDLINK : When this bit is high, to disable link test pulse generation and integrity checking. IO16CON : When this bit is set high the Controller generates IO16* after REG* and CE1* active. If low this output is generated only on address decode ...
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... Otherwise it will work at 16-bit mode. IOSP(MA12 MA12 is pull down, enable I/O base 300H,320H,340H, and 360H separately. If MA12 is not pulled low, despite of the value of PJ1, 0, TC3299A responses to I/O access at the I/O base address 300h, 320h, 340h, and 360h. DCD5BIT(MA13) : Regardless of MA12 setting, once MA13 is pulled down, TC3299A only decodes input address SA4 - SA0 and can only work at I/O Base address ...
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... Multicast Address Register 0(MAR0) Multicast Address Register 1(MAR1) Multicast Address Register 2(MAR2) Multicast Address Register 3(MAR3) Multicast Address Register 4(MAR4) Multicast Address Register 5(MAR5) Multicast Address Register 6(MAR6) Multicast Address Register 7(MAR7) 13/26 TC3299A Preliminary Data Sheet WR WR August 27, 20003 TC3299A-DS-R30 ...
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... Local Next Packet Pointer Address Counter (Upper) Address Counter (Lower) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved RD Command(CR) Reserved Programming Reg. Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 14/26 TC3299A Preliminary Data Sheet WR WR August 27, 20003 TC3299A-DS-R30 ...
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... A0-3. PS1 PS0 0 0 Register Page Register Page Register Page Register Page 3 15/26 TC3299A Preliminary Data Sheet TXP STA STP Not Allowed Remote Read Remote Write (Note) Send Packet Abort/Complete Remote DMA (Note) August 27, 20003 TC3299A-DS-R30 ...
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... LPBK pin high, this places the TC3096 in loopback mode and that D3 of the DCR must be set to zero for loopback operation. 16/26 TC3299A Preliminary Data Sheet WTS Byte Wide 2 Bytes 4 Bytes 8 Bytes 12 Bytes LB1 LB0 CRC August 27, 20003 TC3299A-DS-R30 ...
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... FIFO Underrun: If the EPCC cannot gain access of the bus before the FIFO empties, this bit is set. Transmission of the packet will be aborted. 17/26 TC3299A Preliminary Data Sheet Normal Operation (LPBK=0) Internal Loopback (LPBK=0) External Loopback (LPBK=1) External Loopback (LPBK=0) mim(3+n,10) slot times for first COL - PTX August 27, 20003 TC3299A-DS-R30 ...
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... The missed packet Tally counter will be incremented for each recognized packet. 0: Packets buffered to memory. 1: Packets checked for address match, good CRC and frame Alignment but not buffered to memory. Reserved Reserved 18/26 TC3299A Preliminary Data Sheet SEP August 27, 20003 TC3299A-DS-R30 ...
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... Deferring: Set when CRS or COL inputs are active. If the transceiver has asserted the CD line as a result of the jabber, this bit will stay set indicating the jabber condition CNTE OVWE TXEE 19/26 TC3299A Preliminary Data Sheet FAE CRC PRX RXEE PTXE PRXE August 27, 20003 TC3299A-DS-R30 ...
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... Set when EPCC enters reset state and is cleared when a start command is issued - Set when a Receive Buffer Ring overflows and is cleared when leaves overflow status. Writing to this bit has no effect and powers up high. 20/26 TC3299A Preliminary Data Sheet RXE PTX PRX August 27, 20003 TC3299A-DS-R30 ...
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... CT1 CT0 CT2 CT1 CT0 NC2 NC1 NC0 DB2 DB1 DB0 DA5 DA6 DA7 .. --------|-- Source DA2 DA1 DA0 DA10 DA9 DA8 DA18 DA17 DA16 DA26 DA25 DA24 DA34 DA33 DA32 DA42 DA41 DA40 August 27, 20003 TC3299A-DS-R30 ...
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... FB53 FB52 FB51 FB61 FB60 FB59 22/26 TC3299A Preliminary Data Sheet FB2 FB1 FB0 FB10 FB9 FB8 FB18 FB17 FB16 FB26 FB25 FB24 FB34 FB33 FB32 FB42 FB41 FB40 FB50 FB49 FB48 FB58 FB57 FB56 August 27, 20003 TC3299A-DS-R30 ...
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... A13 A12 A11 A10 A13 A12 A11 A10 A13 A12 A11 A10 23/26 TC3299A Preliminary Data Sheet August 27, 20003 TC3299A-DS-R30 ...
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... A12 A11 A10 A13 A12 A11 A10 24/26 TC3299A Preliminary Data Sheet 1 0 BC9 BC8 1 0 BC1 BC0 August 27, 20003 TC3299A-DS-R30 ...
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... Copyright © 2003, IC Plus Corp. Preliminary Data Sheet 0°C TO -40°C TO -0. 0°C 4.75V TO Min. Typ. Max. Units VSS - 0.8 2.0 - VCC - - -0 0.4 2 25/26 TC3299A 70°C 125°C 7V 70°C 5.25V Conditions V VCC=5V V VCC=5V uA VIN=1.0V uA VIN=VCC V IOL=8.0mA V IOH=4.0mA mA VCC=5V August 27, 20003 TC3299A-DS-R30 ...
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... D 13.90 14.00 14.10 E 13.90 14.00 14.10 0.547 0.551 0.555 e 0.50 0.020 15.90 16.00 16.10 0.626 0.630 0.634 Hd He 15.90 16.00 16.10 0.626 0.630 0.634 0.018 0.024 0.030 L 0.45 0.60 0.75 L 1.00 0.039 1 Y 0.08 0.003 FAX : 886-2-2696-2220 August 27, 20003 TC3299A-DS-R30 ...