CH7307C-DEF Chrontel, CH7307C-DEF Datasheet
CH7307C-DEF
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CH7307C-DEF Summary of contents
Page 1
... The DVI processor includes a low jitter PLL for generation of the high frequency serialized clock, ◊ and all circuitry required to encode, serialize and transmit the data. The CH7307C is able to drive a DFP display at a pixel rate 165MHz, supporting UXGA (1600x1200) resolution displays. 10bit-8bit ...
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... Command Interface _________________________________________________________________7 2.5 Boundary Scan Test _________________________________________________________________8 3.0 Register Control ____________________________________________________________ 10 4.0 Electrical Specifications ______________________________________________________ 11 4.1 Absolute Maximum Ratings __________________________________________________________11 4.2 Recommended Operating Conditions ___________________________________________________11 4.3 Electrical Characteristics ____________________________________________________________11 4.4 DC Specifications __________________________________________________________________12 4.5 AC Specifications __________________________________________________________________14 5.0 Package Dimensions _________________________________________________________ 16 6.0 Revision History ____________________________________________________________ 17 2 Table of Contents 201-0000-062 CH7307C Rev. 1.4, 7/31/2008 ...
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... 1.1 Package Diagram AVDD_PLL 1 RESET SPC SPD 5 6 AGND_PLL 7 DGND 8 SD_PROM 9 SC_PROM 10 SD_DDC 11 SC_DDC DVDD 12 201-0000-062 Rev. 1.4, 7/31/2008 CHRONTEL CH7307C Figure 2: 48-Pin LQFP Pin Out CH7307C 36 AVDD 35 Reserved 34 Reserved 33 SDVO_INT- 32 SDVO_INT+ 31 AGND 30 DGND 29 HPDET 28 DVDD 27 Reserved 26 BSCAN 25 VSWING 3 ...
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... TGND using short and wide traces. BSCAN (internal pull low)/NC This pin should be left open in the application. boundary scan for in-circuit testing. See Section 2.5 for details. Voltage level DVDD 201-0000-062 CH7307C ◊ This pin enables the Rev. 1.4, 7/31/2008 ...
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... Refer to Section 2.1.3 for details. The differential p-p input voltage has a max. value of 1.2V, with a min. value of 175mV. Digital Supply Voltage (2.5V) Digital Ground DVI Transmitter Supply Voltage DVI Transmitter Ground Analog Supply Voltage (2.5V) Analog Ground DVI PLL Supply Voltage (3.3V) DVI PLL Ground CH7307C (3.3V) 5 ...
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... Dummy fill characters (‘0001111010’) are used to stuff the data stream. The CH7307C supports the following clock multipliers and fill patterns shown in Table 2. Table 2: CH7307C supported Pixel Rates, Clock Rates, Data Transfer Rates and Fill Patterns Pixel Rate Clock Rate – ...
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... ADD2 card PROM, DDC, or CH7307C internal registers. The control bus is able to run up to 1MHz when communicating with internal registers 400kHz for the PROM and up to 100kHz for the DDC. ...
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... Boundary Scan Test CH7307C provides so called “NAND TREE Testing” to verify IO cell function at the PC board level. This test will check the interconnect between chip I/O and the printed circuit board for faults (soldering, bend leads, open printed circuit board traces, etc.). NAND tree test is a simple serial logic which turns all IO cell signals to input mode, connects all inputs with NAND gates as shown in Figure 4 and switches each signal to high or low according to the sequence in Table 5 ...
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... TDC1 19 TDC2* 20 TDC2 Table 6: Signals not Tested in NAND Test Pin Name LQFP Pin SDVO_R+ 37 SDVO_R- 38 SDVO_G+ 40 SDVO_G- 41 SDVO_B+ 43 SDVO_B- 44 SDVO_CLK+ 46 SDVO_CLK- 47 RESET* 2 BSCAN 26 Reserved 27 VSWING 25 201-0000-062 Rev. 1.4, 7/31/2008 LQFP Pin CH7307C 9 ...
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... EGISTER ONTROL The CH7307C is controlled via a serial control port. The serial bus uses only the SC clock to latch data into registers, and does not use any internally generated clocks so that the device can be written to in all power down modes. The device will retain all register values during power down modes. ...
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... Conditions Symbol Description Total VDD25 supply current (2.5V supplies) I VDD25 Pixel Rate=162MHz Total VDD33 supply current (3.3V supply) I VDD33 Pixel Rate=162MHz I Total Power Down Current (all supplies) PD 201-0000-062 Rev. 1.4, 7/31/2008 CH7307C Min Typ Max Units -0.5 3.0 -0.5 5.0 Indefinite 0 85 -65 150 150 260 245 225 ...
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... GND-0.5 4.0 GND-0.5 Input INL SD_DDC or SD_EPROM. 4.0kΩ pullup to 2.5V. Input SPC INL and SPD. 5.6kΩ pullup to 5.0V. Input SPC INL and SPD. 5.6kΩ pullup to 5.0V. 2.7 GND-0.5 2.0 201-0000-062 CH7307C Typ Max Unit 1.200 V Ω 100 120 Ω Ω 1.2 V 0.4 V VDD25 + V 0.5 0.4 ...
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... TVDD = 3.3V ± 5% TVDD – = 50Ω ± 0.01 TERM = 1200Ω ± TVDD – SWING 0.6 400 TVDD – 0.01 CH7307C Typ Max Unit 0.5 V VDD33 + V 0.5 0 µA 40 µA 20 µA 40 µA TVDD + V 0.01 TVDD – V 0.4 600 mVp-p TVDD + V 0.01 ...
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... Standard mode 100k Fast mode 400k 1M running speed Fast mode 400K Fast mode 400K Standard mode 100k Standard mode 100k Standard mode 100k Standard mode 100k f = 165MHz XCLK 201-0000-062 CH7307C Typ Max Unit Typ 300ppm Rate] 200 MHz 165 MHz 2 GHz UI 0 ...
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... DVI Output Clock Jitter DVIJIT Notes: Refers to the figure below, the delay refers to the time pass through the internal switches DDC pin 201-0000-062 Rev. 1.4, 7/31/2008 Test Condition Min f = 165MHz XCLK f = 165MHz XCLK 3.3V typ. 2.5V typ. R=5K CH7307C Typ Max Unit 1.2 ns 150 ps To SPC/SPD pin 15 ...
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... Dimension B: Top Package body size may be smaller than bottom package size by as much as 0.15 mm. 3. Dimension B does not include allowable mold protrusions up to 0.25 mm per side .008" SYMBOL 0.17 1.35 0.05 0.50 0.27 1.45 0.15 201-0000-062 CH7307C BOTTOM VIEW K K EXPOSED PAD 0.45 0.09 0° 4 1.00 0.75 0.20 7° 5.5 Rev. 1.4, 7/31/2008 J ...
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... Rev. 1.4, 7/31/2008 Description New release for CH7307C Update SPC, SC_DDC, SC_PROM to In/Out type. Vapor phase soldering information updated Update HPDET description Update power down current number Update DC, AC specifications and order information Update BSCAN pin description. Update Table 5. Pin numbers. ...
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... Chrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used as directed can reasonably expect to result in personal injury or death. Part Number CH7307C-DEF CH7307C-DEF-TR exposed pad in Tape & Reel ©2008 Chrontel, Inc. All Rights Reserved. Printed in the U.S.A. ...