MX29LV320MTMI-90G MCNIX, MX29LV320MTMI-90G Datasheet

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MX29LV320MTMI-90G

Manufacturer Part Number
MX29LV320MTMI-90G
Description
MX29LV320MTMI-90GMacronix International [64M-BIT SINGLE VOLTAGE 3V ONLY UNIFORM SECTOR FLASH MEMORY]
Manufacturer
MCNIX
Datasheet

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Part Number:
MX29LV320MTMI-90G
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MXIC
Quantity:
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FEATURES
GENERAL FEATURES
• Single Power Supply Operation
• Configuration
• Sector structure
• Sector Protection/Chip Unprotect
• Secured Silicon Sector
• Latch-up protected to 250mA from -1V to Vcc + 1V
• Low Vcc write inhibit is equal to or less than 1.5V
• Compatible with JEDEC standard
PERFORMANCE
• High Performance
GENERAL DESCRIPTION
The MX29LV64xM H/L is a 64-mega bit Flash memory
organized as 8M bytes of 8 bits or 4M words of 16 bits
(for MX29LV640M H/L), or 4M words of 16bits (for
MX29LV641M H/L). MXIC's Flash memories offer the
most cost-effective and reliable read/write non-volatile
random access memory. The MX29LV64xM H/L is pack-
aged in 48-pin TSOP and 56-pin TSOP. It is designed to
P/N:PM1093
- 2.7 to 3.6 volt for read, erase, and program opera-
tions
- 8,388,608 x 8 / 4,194,304 x 16 switchable (for
MX29LV640M H/L)
- 4,194,304 x 16 (for MX29LV641M H/L)
- 64KB(32KW) x 128
- Provides sector group protect function to prevent
program or erase operation in the protected sector
group
- Provides chip unprotect function to allow code
changes
- Provides temporary sector group unprotect function
for code changes in previously protected sector groups
- Provides a 128-word/256-byte area for code or data
that can be permanently protected.
- Once this sector is protected, it is prohibited to pro-
gram or erase within the sector again.
- Pin-out and software compatible to single power sup-
ply Flash
- Fast access time: 90ns
- Page read time: 25ns
- Sector erase time: 0.5s (typ.)
- 4 word/8 byte page read buffer
- 16 word/ 32 byte write buffer: reduces programming
time for multiple-word/byte updates
MX29LV64xM H/L
1
• Low Power Consumption
• Minimum 100,000 erase/program cycle
• 20-years data retention
SOFTWARE FEATURES
• Support Common Flash Interface (CFI)
• Program Suspend/Program Resume
• Erase Suspend/ Erase Resume
• Status Reply
HARDWARE FEATURES
• Ready/Busy (RY/BY#) Output (for MX29LV640M H/L
• Hardware Reset (RESET#) Input
• WP#/ACC input
PACKAGE
• 48-pin TSOP (for MX29LV641M H/L)
• 56-pin TSOP (for MX29LV640M H/L)
be reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV64xM H/L offers access time as
fast as 90ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29LV64xM H/L has separate chip enable
64M-BIT SINGLE VOLTAGE 3V ONLY
UNIFORM SECTOR FLASH MEMORY
- Active read current: 18mA(typ.)
- Active write current: 20mA(typ.)
- Standby current: 20uA(typ.)
- Flash device parameters stored on the device and
provide the host system to access.
- Suspend program operation to read other sectors
- Suspends sector erase operation to read data/pro-
gram other sectors
- Data# polling & Toggle bits provide detection of pro-
gram and erase operation completion
only)
- Provides a hardware method of detecting program
and erase operation completion
- Provides a hardware method to reset the internal
state machine to read mode
- Write protect (WP#) function allows protection high-
est or lowest sector, regardless of sector protection
settings
- ACC (high voltage) accelerates programming time
for higher throughput during system
REV. 1.1, AUG. 11, 2005

Related parts for MX29LV320MTMI-90G

MX29LV320MTMI-90G Summary of contents

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FEATURES GENERAL FEATURES • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program opera- tions • Configuration - 8,388,608 4,194,304 x 16 switchable (for MX29LV640M H/L) - 4,194,304 x 16 (for MX29LV641M ...

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MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV64xM H/L uses a command register to manage this functionality. MXIC Flash technology reliably stores memory contents even after 100,000 erase ...

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PIN CONFIGURATION 48 TSOP for MX29LV641M H/L A15 1 A14 2 A13 3 A12 4 A11 5 A10 A21 9 A20 10 WE# 11 RESET# 12 ACC 13 WP# 14 A19 15 A18 16 A17 ...

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PIN DESCRIPTION SYMBOL PIN NAME A0~A21 Address Input Q0~Q14 Data Inputs/Outputs Q15/A-1 Q15(Word Mode)/LSB addr(Byte Mode) CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input RESET# Hardware Reset Pin, Active Low WP#/ACC Hardware Write Protect/Programming Acceleration input ...

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BLOCK DIAGRAM CE# OE# CONTROL WE# INPUT WP# LOGIC BYTE# RESET# ADDRESS LATCH A0-A21 AND BUFFER Q0-Q15 P/N:PM1093 MX29LV64xM H/L PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER ...

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MX29LV64xM H/L SECTOR ADDRESS TABLE Sector Sector Address A21-A12 SA0 0000000xxx SA1 0000001xxx SA2 0000010xxx SA3 0000011xxx SA4 0000100xxx SA5 0000101xxx SA6 0000110xxx SA7 0000111xxx SA8 0001000xxx SA9 0001001xxx SA10 0001010xxx SA11 0001011xxx SA12 0001100xxx SA13 0001101xxx SA14 0001110xxx SA15 ...

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Sector Sector Address A21-A12 SA40 0101000xxx SA41 0101001xxx SA42 0101010xxx SA43 0101011xxx SA44 0101100xxx SA45 0101101xxx SA46 0101110xxx SA47 0101111xxx SA48 0110000xxx SA49 0110001xxx SA50 0110010xxx SA51 0110011xxx SA52 0110100xxx SA53 0110101xxx SA54 0110110xxx SA55 0110111xxx SA56 0111000xxx SA57 0111001xxx ...

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Sector Sector Address A21-A12 SA80 1010000xxx SA81 1010001xxx SA82 1010010xxx SA83 1010011xxx SA84 1010100xxx SA85 1010101xxx SA86 1010110xxx SA87 1010111xxx SA88 1011000xxx SA89 1011001xxx SA90 1011010xxx SA91 1011011xxx SA92 1011100xxx SA93 1011101xxx SA94 1011110xxx SA95 1011111xxx SA96 1100000xxx SA97 1100001xxx ...

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Sector Sector Address A21-A12 SA120 1111000xxx SA121 1111001xxx SA122 1111010xxx SA123 1111011xxx SA124 1111100xxx SA125 1111101xxx SA126 1111110xxx SA127 1111111xxx Note:The address range is A21:A-1 in byte mode (BYTE#=VIL) or A20:A0 in word mode (BYTE#=VIH) P/N:PM1093 MX29LV64xM H/L Sector Size ...

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MX29LV640M H/L Sector Group Protection Ad- dress Table Sector Group A21-A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4-SA7 00001xx SA8-SA11 00010xx SA12-SA15 00011xx SA16-SA19 00100xx SA20-SA23 00101xx SA24-SA27 00110xx SA28-SA31 00111xx SA32-SA35 01000xx SA36-SA39 01001xx SA40-SA43 01010xx SA44-SA47 ...

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Table 1. BUS OPERATION (1) Operation CE# OE# WE# RE- Read L L Write (Program/Erase Accelerated Program L H Standby VCC X 0.3V Output Disable L H Reset X X Sector Group Protect L H (Note 2) Chip ...

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Table 2. AUTOSELECT CODES (High Voltage Method) A21 A14 Description CE# OE# WE# to A15 A10 Manufacturer Cycle 1 Cycle Cycle 3 Cycle 1 Cycle Cycle 3 Sector ...

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REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array ...

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STANDBY MODE When using both pins of CE# and RESET#, the device enter CMOS Standby with both pins held at VCC 0.3V. If CE# and RESET# are held at VIH, but not within the range of VCC 0.3V, the device ...

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It is also possible to determine if the group is protected in the system by writing a Read Silicon ID command. Performing a read operation with A1=VIH, it will produce a logical "1" for the protected sector. CHIP ...

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DATA PROTECTION The MX29LV64xM H/L is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transition. During power up the device automatically re- sets the state machine in the ...

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Write the three-cycle Enter Secured Silicon Sector Region command sequence, and then alternate method of sector protection described in the :Sector Group Protection and Unprotect" section. Once the Secured Silicon Sector is programmed, locked and verified, the system must write ...

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SOFTWARE COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. ...

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Legend: X=Don't care RA=Address of the memory location to be read. RD=Data read from location RA during read operation. PA=Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE# or CE# pulse, ...

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READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to re- trieve data. The device is also ready to read array data after completing an Automatic Program or Automatic Erase ...

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The Byte/Word Program command sequence should be reinitiated once the device has reset to read- ing array data, to ensure data integrity. Programming is allowed in any sequence and across sector boundaries. ...

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When the Program Suspend com- mand is written during a programming process, the de- vice halts the program operation within 15us maximum (5 us typical) and updates the ...

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SECTOR ERASE COMMANDS The Automatic Sector Erase does not require the device to be entirely pre-programmed prior to executing the Au- tomatic Set-up Sector Erase command and Automatic Sector Erase command. Upon executing the Automatic Sector Erase command, the device ...

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QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV64xM H/L is capable of operating in the CFI mode. This mode all the host system to determine the manu- facturer of the device such as operating parameters and configuration. Two commands ...

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Table 4-3. CFI Mode: Device Geometry Data Values Description Device size (2 n bytes) Flash device interface code 0002h = MX29LV640M H/L 0001h = MX29LV641M H/L Maximum number of bytes in multi-byte write (not supported) Number of erase block regions ...

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Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values Description Query-unique ASCII string "PRI" Major version number, ASCII Minor version number, ASCII Address sensitive unlock (0=required, 1= not required) Erase suspend (2= to read and write) Sector protect (N= ...

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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: Q2, Q3, Q5, Q6, Q7, and RY/BY#. Table 5 and the following subsections describe the func- tions of these bits. Q7, RY/BY#, and Q6 ...

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Q7: Data# Polling The Data# Polling bit, Q7, indicates to the host system whether an Automatic Algorithm is in progress or com- pleted, or whether the device is in Erase Suspend. Data# Polling is valid after the rising edge of ...

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Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus, both status bits are required for sectors and mode information. Refer to Table 5 to compare ...

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Toggle Bit low ("0"), the device will accept addi- tional sector erase commands. To insure the command has been accepted, the system software should check the status of Q3 prior to and following each subsequent sector erase ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied .... ...

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DC CHARACTERISTICS TA=- VCC=2.7V~3.6V Para- meter Description I LI Input Load Current (Note 1) I LIT A9 Input Leakage Current I LO Output Leakage Current ICC1 VCC Initial Read Current (Notes 2,3) ICC2 VCC Intra-Page Read ...

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SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL 6.2K ohm KEY TO SWITCHING WAVEFORMS WAVEFORM Don't Care, Any Change Permitted SWITCHING TEST WAVEFORMS 3.0V 0.0V P/N:PM1093 MX29LV64xM H/L TEST SPECIFICATIONS Test Condition Output Load 2.7K ohm Output Load Capacitance, CL 3.3V ...

Page 34

AC CHARACTERISTICS Read-Only Operations TA=- VCC=2.7V~3.6V Parameter Std. Description tRC Read Cycle Time (Note 1) tACC Address to Output Delay tCE Chip Enable to Output Delay tPACC Page Access Time tOE Output Enable to Output Delay ...

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Figure 1. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE# VIL VIH WE# VIL VIH OE# VIL HIGH Z VOH Outputs VOL VIH RESET# VIL RY/BY# 0V Figure 2. PAGE READ TIMING WAVEFORMS A2-A21 (A-1), A0~A2 tACC CE# OE# Output ...

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AC CHARACTERISTICS Parameter Description tREADY1 RESET# PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET# PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP RESET# Pulse Width (NOT During Automatic Algorithms) tRH ...

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AC CHARACTERISTICS Erase and Program Operations Parameter Std. Description tWC Write Cycle Time (Note 1) tAS Address Setup Time tASO Address Setup Time to OE# low during toggle bit polling tAH Address Hold Time tAHT Address Hold Time From CE# ...

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ERASE/PROGRAM OPERATION Figure 4. AUTOMATIC PROGRAM TIMING WAVEFORMS Program Command Sequence(last two cycle) tWC XXXh Address CE# OE# tWP WE# tCS tDS Data RY/BY# tVCS VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address Figure ...

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Figure 6. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM1093 MX29LV64xM H/L START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES ...

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Figure 7. WRITE BUFFER PROGRAMMING ALGORITHM FLOWCHART Write "Write to Buffer" command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Write first address/data Yes Abort Write to Buffer Operation ...

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Figure 8. PROGRAM SUSPEND/RESUME FLOWCHART P/N:PM1093 MX29LV64xM H/L Program Operation or Write-to-Buffer Sequence in Progress Write Program Suspend Command Sequence Write address/data Command is also valid for XXXh/B0h Erase-suspended-program operations Wait 15us Autoselect and Secured Sector Read data as read ...

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Figure 9. AUTOMATIC CHIP/SECTOR ERASE TIMING WAVEFORM Erase Command Sequence(last two cycle) tWC 2AAh Address CE# OE# WE# tCS Data RY/BY# tVCS VCC NOTES: 1.SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status"). P/N:PM1093 MX29LV64xM H/L ...

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Figure 10. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM1093 MX29LV64xM H/L START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address ...

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Figure 11. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM1093 MX29LV64xM H/L START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector ...

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Figure 12. ERASE SUSPEND/RESUME FLOWCHART P/N:PM1093 MX29LV64xM H/L START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter Std. Description tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tGHEL Read Recovery Time Before Write ...

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Figure 13. CE# CONTROLLED PROGRAM TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE# tGHEL OE# CE# tWS Data tRH RESET# RY/BY# NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, Q7=complement of data written to device. 2.Figure indicates ...

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SECTOR GROUP PROTECT/CHIP UNPROTECT Figure 14. Sector Group Protect / Chip Unprotect Waveform (RESET# Control) VID VIH RESET# SA, A6 A1, A0 Sector Group Protect or Chip Unprotect Data 60h 1us CE# WE# OE# Note: For sector group protect A6=0, ...

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Figure 15. IN-SYSTEM SECTOR GROUP PROTECT/CHIP UNPROTECT ALGORITHMS WITH RESET#=VID START PLSCNT=1 RESET#=VID Wait 1us No First Write Temporary Sector Unprotect Mode Cycle=60h? Yes Set up sector address Sector Protect: Write 60h to sector address with A6=0, A1=1, A0=0 Wait ...

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AC CHARACTERISTICS Parameter Description tVLHT Voltage transition time tWPP1 Write pulse width for sector group protect tOESP OE# setup time to WE# active Figure 16. SECTOR GROUP PROTECT TIMING WAVEFORM (A9, OE# Control 12V 3V A9 tVLHT 12V ...

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Figure 17. SECTOR GROUP PROTECTION ALGORITHM (A9, OE# Control) No PLSCNT=32? Yes Device Failed P/N:PM1093 MX29LV64xM H/L START Set Up Sector Addr PLSCNT=1 OE#=VID, A9=VID, CE#=VIL A6=VIL Activate WE# Pulse Time Out 150us Set WE#=VIH, CE#=OE#=VIL A9 should remain VID ...

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Figure 18. CHIP UNPROTECT TIMING WAVEFORM (A9, OE# Control) A1 12V 3V A9 tVLHT A6 12V 3V OE# tVLHT WE# CE# Data P/N:PM1093 MX29LV64xM H/L tWPP 2 tOESP 52 Verify tVLHT 00H F0H tOE REV. 1.1, AUG. 11, 2005 ...

Page 53

Figure 19. CHIP UNPROTECT FLOWCHART (A9, OE# Control) Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM1093 MX29LV64xM H/L START Protect All Sectors PLSCNT=1 Set OE#=A9=VID CE#=VIL, A6=1 Activate WE# ...

Page 54

AC CHARACTERISTICS Parameter Description tVIDR VID Rise and Fall Time (see Note) tRSP RESET# Setup Time for Temporary Sector Unprotect tRRB RESET# Hold Time from RY/BY# High for Temporary Sector Group Unprotect Figure 20. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS 12V ...

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Figure 21. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART Note : 1. All protected sectors are temporary unprotected. P/N:PM1093 MX29LV64xM H/L Start RESET# = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET# = VIH Temporary Sector Unprotect Completed(Note 2) ...

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Figure 22. SECURED SILICON SECTOR PROTECTED ALGORITHMS FLOWCHART Device Failed P/N:PM1093 MX29LV64xM H/L START Enter Secured Silicon Sector Wait 1us First Wait Cycle Data=60h Second Wait Cycle Data=60h A6=0, A1=1, A0=0 Wait 300us No Data = 01h ? Yes Write ...

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Figure 23. SILICON ID READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC VIH A1 VIL VIH A2 VIL VIH ADD VIL CE# VIH VIL tCE VIH WE# VIL tOE VIH OE# VIL VIH ...

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WRITE OPERATION STATUS Figure 24. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE# tCH tOE OE# tOEH WE# Q7 Q0-Q6 tBUSY RY/BY# NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last ...

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Figure 25. DATA# POLLING ALGORITHM Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1093 MX29LV64xM H/L Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ? ...

Page 60

Figure 26. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE# tCH tOE OE# tOEH WE# tDH Q6/Q2 Valid Status RY/BY# NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command ...

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Figure 27. TOGGLE BIT ALGORITHM NO Note: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1093 MX29LV64xM H/L START Read Q7~Q0 ...

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Figure 28. Q6 versus Q2 Enter Embedded Erase Erasing Suspend Erase WE NOTES: The system can use OE# or CE# to toggle Q2/Q6, Q2 toggles only when read at an address within an erase-suspended P/N:PM1093 MX29LV64xM H/L Enter ...

Page 63

ERASE AND PROGRAMMING PERFORMANCE (1) PARAMETER Sector Erase Time Chip Erase Time Total Write Buffer Program Time (Note 4) Total Accelerated Effective Write Buffer Program Time (Note 4) Chip Program Time Notes: 1. Typical program and erase times assume the ...

Page 64

TSOP PIN AND BGA PACKAGE CAPACITANCE Parameter Symbol Parameter Description CIN Input Capacitance COUT Output Capacitance CIN2 Control Pin Capacitance Notes: 1. Sampled, not 100% tested. 2. Test conditions TA=25 C, f=1.0MHz P/N:PM1093 MX29LV64xM H/L Test Set TYP VIN=0 TSOP ...

Page 65

ORDERING INFORMATION PART NO. ACCESS TIME (ns) MX29LV640MHTC-90 90 MX29LV640MLTC-90 90 MX29LV640MHTI-90 90 MX29LV640MLTI-90 90 MX29LV641MHTC-90 90 MX29LV641MLTC-90 90 MX29LV641MHTI-90 90 MX29LV641MLTI-90 90 P/N:PM1093 MX29LV64xM H/L Ball Pitch/ PACKAGE Ball size 56 Pin TSOP (Normal Type) 56 Pin TSOP (Normal ...

Page 66

PART NAME DESCRIPTION 640 P/N:PM1093 MX29LV64xM H OPTION: G: Lead-free package R: Restricted VCC (3.0V~3.6V) Q: Restricted VCC (3.0V~3.6V) with Lead-free package blank: normal SPEED: 70: 70ns 90: 90ns 10:100ns TEMPERATURE ...

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PACKAGE INFORMATION P/N:PM1093 MX29LV64xM H/L 67 REV. 1.1, AUG. 11, 2005 ...

Page 68

P/N:PM1093 MX29LV64xM H/L 68 REV. 1.1, AUG. 11, 2005 ...

Page 69

REVISION HISTORY Revision No. Description 1.0 1. Removed "Preliminary" 1.1 1. Added note 7 for ILIT parameter in DC Characteristics table 2. Added comments into performance table 3. Added Part Name Description P/N:PM1093 MX29LV64xM H/L Page P1 P32 P63 P66 ...

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MX29LV64xM H/L MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...

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