KM416C254DT-4 Samsung, KM416C254DT-4 Datasheet

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KM416C254DT-4

Manufacturer Part Number
KM416C254DT-4
Description
High Speed 256K x 16-Bit CMOS Dynamic RAM with Extended Data Out
Manufacturer
Samsung
Datasheet
FEATURES
• Part Identification
• Active Power Dissipation
• Refresh Cycles
• Perfomance Range
This is a family of 262,144 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Access time (-4), power consumption(Normal or Low power) and package type(SOJ or TSOP-II)
are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode DRAM family is fabricated using Samsung s
advanced CMOS process to realize high band-width, low power consumption and high reliability.
It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
KM416C254D
C254D
Speed
High Speed
Part
NO.
- KM416C254D/DL (5V, 512 Ref.)
-4
Speed
-4
V
5V
High Speed 256K x 16Bit CMOS Dynamic RAM with Extended Data Out
CC
40ns
t
RAC
Refresh
cycle
512
Active Power Dissipation
13ns
t
CAC
Normal
8ms
Refresh period
990
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
69ns
t
RC
Unit : mW
128ms
L-ver
17ns
t
HPC
DESCRIPTION
A0~A8
UCAS
LCAS
RAS
W
FUNCTIONAL BLOCK DIAGRAM
• Extended Data Out Mode operation
• 2 CAS Byte/Wrod Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 40-pin SOJ 400mil and 44(40)-pin
• Triple +5V 10% power supply
TSOP(II) 400mil packages
Control
Clocks
Row Address Buffer
Col. Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
VBB Generator
Column Decoder
Memory Array
Row Decoder
262,144 x16
Cells
CMOS DRAM
Vcc
Vss
Data out
Data out
Data in
Data in
Lower
Buffer
Lower
Buffer
Upper
Buffer
Upper
Buffer
DQ15
OE
DQ0
DQ7
DQ8
to
to

Related parts for KM416C254DT-4

KM416C254DT-4 Summary of contents

Page 1

... All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode DRAM family is fabricated using Samsung s advanced CMOS process to realize high band-width, low power consumption and high reliability. ...

Page 2

... Data In/Out V Ground SS RAS Row Address Strobe UCAS Upper Column Address Strobe LCAS Lower Column Address Strobe W Read/Write Input OE Data Output Enable V Power(+5V) CC N.C No Connection CMOS DRAM •KM416C254DT DQ0 DQ15 3 38 DQ1 DQ14 4 37 DQ2 DQ13 5 36 ...

Page 3

High Speed KM416C254D ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage Temperature Power Dissipation Short Circuit Output Current * Permanent device damage may occur if "ABSOLUTE MAXIMUM ...

Page 4

High Speed KM416C254D DC AND OPERATING CHARACTERISTICS Symbol Power I Don t care CC1 I Don t care CC2 I Don t care CC3 I Don t care CC4 Normal I CC5 L I Don t care CC6 I L ...

Page 5

High Speed KM416C254D CAPACITANCE (T = Parameter Input capacitance [A0 ~ A12] Input capacitance [RAS, UCAS, LCAS, W, OE] Output capacitance [DQ0 - DQ15] AC CHARACTERISTICS ( Test condition : V =5.0V 10%, Vih/Vil=2.8/0.4V, Voh/Vol=2.0/0.8V ...

Page 6

High Speed KM416C254D AC CHARACTERISTICS (Continued) Parameter Data set-up time Data hold time Refresh period (Normal) Refresh period (L-ver) CAS to W delay time RAS to W delay time Column address to W delay time CAS precharge to W delay ...

Page 7

High Speed KM416C254D NOTES An initial pause of 200us is required after power-up followed by any 8 RAS-only refresh or CAS-before-RAS refresh cycles 1. before proper device operation is achieved. V (min) and V (max) are reference levels for measuring ...

Page 8

High Speed KM416C254D are referenced to the earlier CAS rising edge. 13. ASC CAH t 14. is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next ...

Page 9

High Speed KM416C254D WORD READ CYCLE RAS CRP UCAS CRP LCAS ASR ADDRESS V - ...

Page 10

High Speed KM416C254D LOWER BYTE READ CYCLE NOTE : D = OPEN RAS CRP UCAS CRP LCAS ASR ...

Page 11

High Speed KM416C254D UPPER BYTE READ CYCLE NOTE : D = OPEN RAS CRP UCAS CRP LCAS ASR ...

Page 12

High Speed KM416C254D WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V - ...

Page 13

High Speed KM416C254D LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V ...

Page 14

High Speed KM416C254D UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V ...

Page 15

High Speed KM416C254D WORD WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V ...

Page 16

High Speed KM416C254D LOWER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ...

Page 17

High Speed KM416C254D UPPER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ...

Page 18

High Speed KM416C254D WORD READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ...

Page 19

High Speed KM416C254D LOWER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ...

Page 20

High Speed KM416C254D UPPER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ...

Page 21

High Speed KM416C254D HYPER PAGE MODE WORD READ CYCLE RAS CRP UCAS CRP LCAS ASR RAH V ...

Page 22

High Speed KM416C254D HYPER PAGE MODE LOWER BYTE READ CYCLE RAS CRP UCAS LCAS ASR RAH V - ...

Page 23

High Speed KM416C254D HYPER PAGE MODE UPPER BYTE READ CYCLE RAS CRP UCAS CRP LCAS ASR RAH ...

Page 24

High Speed KM416C254D HYPER PAGE MODE WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP ...

Page 25

High Speed KM416C254D HYPER PAGE MODE LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP V - ...

Page 26

High Speed KM416C254D HYPER PAGE MODE UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP V - ...

Page 27

High Speed KM416C254D HYPER PAGE MODE WORD READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS RAD ...

Page 28

High Speed KM416C254D HYPER PAGE MODE LOWER BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ...

Page 29

High Speed KM416C254D HYPER PAGE MODE UPPER BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ...

Page 30

High Speed KM416C254D HYPER PAGE READ AND WRITE MIXED CYCLE RAS UCAS LCAS t RAD RAH t ASR V - ...

Page 31

High Speed KM416C254D RAS - ONLY REFRESH CYCLE NOTE : Don t care OPEN OUT RAS CRP UCAS ...

Page 32

High Speed KM416C254D HIDDEN REFRESH CYCLE ( READ ) RAS CRP UCAS CRP LCAS ASR ...

Page 33

High Speed KM416C254D HIDDEN REFRESH CYCLE ( WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ...

Page 34

High Speed KM416C254D CAS-BEFORE-RAS REFRESH COUNTER TEST CYCLE RAS CSR UCAS CSR LCAS ...

Page 35

High Speed KM416C254D CAS - BEFORE - RAS SELF REFRESH CYCLE NOTE : Don t care RAS RPC UCAS LCAS ...

Page 36

High Speed KM416C254D PACKAGE DIMENSION 40 SOJ 400mil #40 #1 0.0375 (0.95) 44(40) TSOP(II) 400mil 0.032 (0.805) 1.041 (26.44) MAX 1.020 (25.92) 1.030 (26.16) 0.026 (0.66) 0.050 (1.27) 0.032 (0.81) 0.015 (0.38) 0.021 (0.53) 0.741 (18.81) MAX 0.721 (18.31) 0.047 ...

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