AT32UC3A0256AU Atmel Corporation, AT32UC3A0256AU Datasheet - Page 157
AT32UC3A0256AU
Manufacturer Part Number
AT32UC3A0256AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0256AU
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
32002F–03/2010
5
6
7
8
Secure State ........................................................................................... 59
Memory System ..................................................................................... 61
Memory Protection Unit ........................................................................ 66
Instruction Cycle Summary .................................................................. 71
4.4Detailed instruction description ...............................................................................43
5.1Basic concept ..........................................................................................................59
5.2Typical use scenario ................................................................................................59
5.3Secure state boot sequence ....................................................................................60
5.4Secure state debugging ..........................................................................................60
5.5Events in secure state .............................................................................................60
6.1Memory sections .....................................................................................................61
6.2Memory interfaces ...................................................................................................62
6.3IF stage interface .....................................................................................................62
6.4EX stage interfaces .................................................................................................62
6.5IRAM Write buffer ....................................................................................................64
6.6Memory barriers ......................................................................................................64
7.1Memory map in systems with MPU .........................................................................66
7.2Understanding the MPU ..........................................................................................66
7.3Example of MPU functionality .................................................................................70
8.1Definitions ................................................................................................................71
8.2Special considerations ............................................................................................71
8.3CPU revision ...........................................................................................................72
8.4ALU instructions ......................................................................................................72
8.5Multiply instructions .................................................................................................75
8.6MAC instructions .....................................................................................................76
8.7MulMac64 instructions .............................................................................................76
8.8Divide instructions ...................................................................................................77
8.9Saturate instructions ................................................................................................77
8.10Load and store instructions ...................................................................................77
8.11Multiple data memory access instructions .............................................................81
8.12Branch instructions ................................................................................................82
8.13Call instructions .....................................................................................................82
8.14Return from execution mode instructions ..............................................................82
8.15Swap instructions ..................................................................................................83
8.16System register instructions ..................................................................................83
AVR32
ii