AT32UC3A0512AU Atmel Corporation, AT32UC3A0512AU Datasheet - Page 5
AT32UC3A0512AU
Manufacturer Part Number
AT32UC3A0512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0512AU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
32058KS–AVR32–01/12
4. Blockdiagram
Figure 4-1.
RESET_N
PA
PB
PC
PX
VBU S
D+
D -
Blockdiagram
TC K
TDO
TM S
TD I
XO UT32
XO U T0
XO U T1
R XD[3..0],
TXD [3..0],
XIN 32
R X_CLK,
TX_C LK,
XIN0
XIN1
R X_DV,
TX_EN ,
TX_ER ,
SPEED
RX_ER
VBO F
M DC ,
M D IO
CO L,
CR S,
ID
EXTIN T[7..0]
G CLK[3..0]
KPS[7..0]
CLK[2..0]
N M I_N
A[2..0]
B[2..0]
115 kHz
RCO SC
32 KHz
O SC0
O SC1
PLL0
PLL1
M SEO[1..0]
O SC
M D O[5..0]
INTERFACE
INTERFACE
EVTO_N
ETHERNET
EVTI_N
M C KO
JTAG
DM A
DM A
USB
M AC
TIM ER /CO UNTER
CO NTRO LLER
CO NTRO LLER
CO NTRO LLER
PB
CO NTRO LLER
CO NTRO LLER
G ENERATO R
W ATCHDO G
INTERRUPT
INTERRUPT
EXTERNAL
REAL TIM E
M ANAG ER
CO UNTER
BRIDG E B
S
M
M
PO W ER
HSB-PB
CLO CK
CLO CK
RESET
SLEEP
TIM ER
CLASS 2+
NEXUS
S
H S
O CD
B
M
C ON FIGU RATIO N
INTERFACE
INSTR
HIG H SPEED
BUS M ATRIX
M EM O RY PRO TEC TIO N U NIT
BRIDG E A
HSB-PB
M
H SB
PB
S
UC CPU
REG ISTER S BUS
INTERFACE
DATA
M
CO NTRO LLER
SYNCHRO NO US
PERIPHERAL
INTERFACE 0/1
CO NTRO LLER
PULSE W IDTH
CO NTRO LLER
M O DULATIO N
PERIPHERAL
CO NVERTER
ANALO G TO
INTERFACE
BITSTREAM
TW O -W IRE
DIG ITAL
USART1
USART0
USART2
USART3
SERIAL
SERIAL
DM A
AUDIO
DAC
M
S
S
S
LOC AL BU S
INTERFACE
SRAM
64 KB
RX _C LO C K, R X_FRA ME _SYN C
TX _C LO C K, TX_FRA ME _SYN C
D SR, DTR, D CD , RI
D ATAN [1..0]
M ISO , M O SI
NPC S[3..1]
DATA[1..0]
PW M [6..0]
R TS, C TS
R TS, C TS
R X_D ATA
TX_D ATA
AD[7..0]
512 KB
FLASH
NPC S0
SC K
SD A
R XD
TXD
R XD
TXD
SC L
CLK
CLK
FAST G PIO
ADD R[23..0]
D ATA[15..0]
NC S[3..0]
SDC KE
SD CS0
NW AIT
SD A10
SD W E
N W E0
N W E1
N W E3
SD CK
N RD
RAS
CAS
AT32UC3A
AD VREF
PA
PB
PC
PX
5