AT32UC3A1128 Atmel Corporation, AT32UC3A1128 Datasheet - Page 597
AT32UC3A1128
Manufacturer Part Number
AT32UC3A1128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
Specifications of AT32UC3A1128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A1128-U
Manufacturer:
ATMEL
Quantity:
13
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A0128 PDF datasheet #4
- AT32UC3A0128 PDF datasheet #5
- Current page: 597 of 826
- Download datasheet (11Mb)
32058K AVR32-01/12
30.8.3
30.8.3.1
Offset:
Register Name:
Access Type:
Reset Value:
• SOFE: Start of Frame Generation Enable
Set this bit to generate SOF on the USB bus in full speed mode and keep alive in low speed mode.
Clear this bit to disable the SOF generation and to leave the USB bus in idle state.
This bit is set by hardware when a USB reset is requested or an upstream resume interrupt is detected (UHINT.TXRSMI).
• RESET: Send USB Reset
Set this bit to generate a USB Reset on the USB bus.
Cleared by hardware when the USB Reset has been sent.
It may be useful to clear this bit by software when a device disconnection is detected (UHINT.DDISCI is set) whereas a
USB Reset is being sent.
• RESUME: Send USB Resume
Set this bit to generate a USB Resume on the USB bus.
Cleared by hardware when the USB Resume has been sent or when a USB reset is requested. Clearing by software has
no effect. This bit should be set only when the start of frame generation is enable. (SOFE bit set).
31
23
15
–
–
–
7
–
USB Host Registers
USB Host General Control Register (UHCON)
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
0x0400
UHCON
Read/Write
0x00000000
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
RESUME
rwu
26
18
10
–
–
0
2
–
RESET
rwu
25
17
–
–
9
0
1
–
AT32UC3A
SOFE
rwu
24
16
–
–
8
0
0
–
597
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