AT32UC3L032 Atmel Corporation, AT32UC3L032 Datasheet - Page 101
AT32UC3L032
Manufacturer Part Number
AT32UC3L032
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L016.pdf
(843 pages)
4.AT32UC3L016.pdf
(110 pages)
Specifications of AT32UC3L032
Flash (kbytes)
32 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L032-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
9.2.14.3
32002F–03/2010
Debug Communication CPU Register (DCCPU)
features on this device. This information is static, and may be used to develop generic Nexus
debuggers which will work across a family of AVR32 devices with different Nexus configurations.
Table 9-6.
If the CPU wants to transmit data to the debugger tool, it writes data to the Debug Communica-
tion CPU Register using mtdr. By writing this register, a dirty bit is set in the Debug
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit Number
31:29
28
27:25
24
23
22
21
20:17
16
15:12
11:8
7:4
3:0
Nexus Configuration Register
Field Name
Reserved
NXDMA
NXDTC
NXDRT
NXDWT
NXOT
NXPT
NXMDO
NXMSEO
NXDB
NXPCB
NXOCD
NXARCH
Init. Val.
0
0
0
0
0
0
0
6
1
2
6
0
0
Description
Direct Memory Access support
0 = Not supported
1 = Supported
Data Trace Channels
0 = Not supported
1 = Supported
Data Read Trace Support
0 = Not supported
1 = Supported
Data Write Trace Support
0 = Not supported
1 = Supported
Ownership Trace support
0 = Not supported
1 = Supported
Program Trace support
0 = Not supported
1 = Supported
AUX MDO pins
0 = no MDO or MSEO pins
n = n MDO pins, NXMSEO MSEO pins
AUX MSEO pins
0 = 1 MSEO pin
1 = 2 MSEO pins
Number of Data breakpoints
Number of PC breakpoints
OCD Version
0000 = AVR32AP OCD
0001 = AVR32UC OCD
Other = Reserved
Architecture
0000 = AVR32B
0001 = AVR32A
Other = reserved
AVR32
101