AT86RF231 Atmel Corporation, AT86RF231 Datasheet - Page 155

• Manufacturer Part Number: AT86RF231
• Manufacturer: Atmel Corporation

Specifications of AT86RF231

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

11.9
11.9.1
11.9.2
8111C–MCU Wireless–09/09
Configurable Start-Of-Frame Delimiter
Overview
Register Description
The SFD is a field indicating the end of the SHR and the start of the packet data. The length of
the SFD is 1 octet (2 symbols). This octet is used for byte synchronization only and is not
included in the Frame Buffer.
The value of the SFD could be changed if it is needed to operate non IEEE 802.15.4 compliant
networks. An IEEE 802.15.4 compliant network node does not synchronize to frames with a dif-
ferent SFD value.
Due to the way the SHR is formed, it is not recommended to set the low-order 4 bits to 0. The
LSB of the SFD is transmitted first, i.e. right after the last bit of the preamble sequence.
Register 0x0B (SFD_VALUE):
This register contains the one octet start-of-frame delimiter (SFD) to synchronize to a received
frame.
• Bit [7:0] - SFD_VALUE
For compliant IEEE 802.15.4 networks set SFD_VALUE = 0xA7, as specified by
is the default value of the register.
To establish non IEEE 802.15.4 compliant networks the SFD value can be changed to any other
value. If enabled an IRQ_2 (RX_START) is issued only if the received SFD matches the register
content of register SFD_VALUE and a valid PHR is received.
Bit
+0x0B
Read/Write
Reset Value
R/W
7
1
R/W
6
0
R/W
5
1
SFD_VALUE[7:0]
R/W
4
0
R/W
3
0
R/W
2
1
R/W
1
1
AT86RF231
R/W
0
1
[1]
SFD_VALUE
and [2]. This
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