AT89C5132 Atmel Corporation, AT89C5132 Datasheet

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... TQFP80, PLCC84 (Development Board Only) – Dice 1. Description The AT89C5132 is a mass storage device controlling data exchange between various Flash modules, HDD and CD-ROM. The AT89C5132 includes 64K Bytes of Flash memory and allows In-System Program- ming through an embedded 4K Bytes of Boot Flash Memory. ...

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... Block Diagram Figure 3-1. AT89C5132 Block Diagram INT0 INT1 Interrupt Handler Unit RAM 2304 Bytes C51 (X2 CORE) Clock and PLL Unit FILT X1 X2 RST DOUT Notes: 1. Alternate function of Port 3 2. Alternate function of Port 4 3. Alternate function of Port 1 AT89C5132 2 AV ...

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... Pin Description Figure 4-1. 4173ES–USB–09/07 AT89C5132 80-pin TQFP Package ALE 1 ISP 2 P1.0/KIN0 3 P1.1/KIN1 4 P1.2/KIN2 5 P1.3/KIN3 6 P1.4 7 P1.5 8 P1.6/SCL 9 P1.7/SDA 10 VDD 11 PVDD 12 FILT 13 PVSS 14 VSS TST 18 UVDD 19 UVSS 20 AT89C5132 TQFP80 ...

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... Figure 4-2. Note: 4.1 Signals All the AT89C5132 signals are detailed by functionality in Table 1 to Table 14. Table 1. Ports Signal Description Signal Name P0.7:0 P1.7:0 AT89C5132 4 (1) AT89C5132 84-pin PLCC ALE 12 ISP 13 P1.0/KIN0 14 P1.1/KIN1 15 P1.2/KIN2 16 P1.3/KIN3 17 P1.4 18 P1.5 19 P1.6/SCL 20 P1.7/SDA 21 VDD 22 PAVDD 23 FILT 24 PAVSS 25 VSS ...

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... INT1 serves as external run control for timer 1, when selected by GATE1 bit in TCON register. I External Interrupt 1 INT1 input sets IE1 in the TCON register. If bit IT1 in this register is set, bit IE1 is set by a falling edge on INT1. If bit IT1 is cleared, bit IE1 is set by a low level on INT1. AT89C5132 Alternate Function A15:8 RXD TXD INT0 ...

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... Signal Name D+ D- Table 6. MutiMediaCard Interface Signal Description Signal Name MCLK MCMD MDAT AT89C5132 6 Type Description Timer 0 External Clock Input I When timer 0 operates as a counter, a falling edge on the T0 pin increments the count. Timer 1 External Clock Input I When timer 1 operates as a counter, a falling edge on the T1 pin increments the count ...

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... TWI Serial Data I/O SDA is the bidirectional Two Wire data line. Type Description I A/D Converter Analog Inputs I Analog Positive Voltage Reference Input Analog Negative Voltage Reference Input I This pin is internally connected to AVSS. AT89C5132 Alternate Function P3.0 P3.1 Alternate Function P4.0 P4.1 P4.2 P4.3 Alternate Function P1 ...

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... Name A15:8 AD7:0 ALE ISP RD WR Table 13. System Signal Description Signal Name RST TST AT89C5132 8 Type Description Keypad Input Lines I Holding one of these pins high or low for 24 oscillator periods triggers a keypad interrupt. Type Description Address Lines I/O Upper address lines for the external bus. ...

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... Connect this pin to ground. PLL Supply voltage PWR Connect this pin to +3V supply voltage. PLL Circuit Ground GND Connect this pin to ground. USB Supply Voltage PWR Connect this pin to +3V supply voltage. USB Ground GND Connect this pin to ground. AT89C5132 Alternate Function - - - - - - - - 9 ...

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... Internal Pin Structure Table 15. Detailed Internal Pin Structure Latch Output Notes: AT89C5132 10 (1) Circuit VDD VDD Watchdog Output P VSS VDD 2 osc periods VSS VDD P N VSS VDD P N VSS For information on resistors value, input/output levels, and drive capability, refer to the Section “ ...

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... ISP. It also contains some Application Programming Interfaces routines commonly known as API allowing user to develop his own bootloader. 5.0.3 Data Memory The AT89C5132 derivatives implement 2304 bytes of on-chip data RAM. This memory is divided in two separate areas: • 256 bytes of on-chip RAM memory (standard C51 memory). ...

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... Universal Serial Bus Interface MultiMedia Card Interface IDE/ATAPI Interface AT89C5132 12 The AT8xC5132 peripherals are briefly described in the following sections. For further details on how to interface (hardware and software) to these peripherals, please refer to the AT8xC5132 complete datasheet. The AT8xC5132 internal clocks are extracted from an on-chip PLL fed by an on-chip oscillator ...

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... Interface Two-wire Controller A/D Controller 4173ES–USB–09/07 The AT89C5132 implements a serial port with its own baud rate generator providing one single synchronous communication mode and three full-duplex Universal Asynchronous Receiver Transmitter (UART) communication modes provided for the following purposes: • ...

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... OH2 MDAT, MCLK, SCLK, DCLK, DSEL, DOUT, D+, D-) Logical 0 Input Current (P1, P2, P3 and P5) AT89C5132 14 *NOTICE: Stressing the device beyond the “Absolute Maxi- mum Ratings” may cause permanent damage. -0.3 to +4.0V These are stress ratings only. Operation beyond the “operating conditions” is not recommended and extended exposure beyond the “ ...

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... Flash retention is guaranteed with the same formula for V 3. See Table 154 for typical consumption in player mode. I Test Condition, Active Mode DD VDD RST (NC) X2 Clock Signal X1 VSS PVSS UVSS AVSS VSS All other pins are unconnected AT89C5132 (1) Max Units μA 10 0.45< V μA -650 Vin = 2.0 V 200 kΩ 25°C A 1.8 ...

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... A-to-D Converter Table 2. A-to-D Converter DC Characteristics V = 2 Symbol REF R REF C IA AT89C5132 16 I Test Condition, Idle Mode DL RST VSS (NC) X2 Clock Signal X1 VSS PVSS UVSS AVSS VSS All other pins are unconnected I Test Condition, Power-Down Mode PD RST VSS ...

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... X1 and X2 may not be used to drive other circuits. = -40 to +85°C A Parameter V Internal Capacitance ( Internal Capacitance ( Equivalent Load Capacitance (X1 - X2) Drive Level Crystal Frequency Crystal Series Resistance Crystal Shunt Capacitance PLL Filter Connection FILT AT89C5132 Min Typ Max VSS VSS Unit μ ...

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... Symbol R USB R FS 6.2.7 In-system Programming 6.2.7.1 Schematic Figure 6-7. 6.2.7.2 Parameters Table 5. ISP Pull-Down Characteristics 3. Symbol R ISP AT89C5132 18 = -40 to +85°C A Parameter Filter Resistor Filter Capacitance 1 Filter Capacitance 2 USB Connection To Power VBUS Supply D+ D- GND VSS = -40 to +85°C A Parameter USB Termination Resistor ...

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... CLCL RD high to ALE High T CLCL Address Valid to Valid Data In Address Valid to RD Low 4·T CLCL RD Low to Valid Data RD Low to Address Float Data Hold After RD High Instruction Float After RD High AT89C5132 Conditions Variable Clock Variable Clock Standard Mode X2 Mode Max ...

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... LHLL T AVLL T LLAX T LLWL T WLWH T WHLH T AVWL T QVWH T WHQX 6.3.1.3 Waveforms Figure 6-8. AT89C5132 20 = -40° to +85°C A Variable Clock Standard Mode Parameter Min Clock Period 50 ALE Pulse Width 2·T -15 CLCL Address Valid to ALE Low T -20 CLCL Address hold after ALE Low T -20 ...

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... External 8-bit Bus Cycle – Data Write Waveforms ALE T LHLL T LLWL WR T AVWL T T AVLL LLAX P0 A7:0 P2 Signals A Address D Data In L ALE Q Data Out AT89C5132 T T WLWH WHLH T T QVWH WHQX D7:0 Data Out A15:8 Conditions High Low Valid No Longer Valid Floating 21 ...

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... T CLCL T LHLL T AVLL T LLAX T LLWL T WLWH T WHLH T AVWL T QVWH T WHQX AT89C5132 22 = -40° to +85°C A Variable Clock Standard Mode Parameter Min Clock Period 50 ALE Pulse Width 2·T CLCL Address Valid to ALE Low T -20 CLCL Address hold after ALE Low T -20 CLCL ALE Low to RD Low 3· ...

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... D15:8 is written in DAT16H SFR. ALE T LHLL T LLWL WR T AVWL T T AVLL LLAX P0 A7:0 P2 A15:8 D15:8 is the content of DAT16H SFR. Signals C Clock I Data In O Data Out AT89C5132 T T RLRH RHLH T RLDV T RHDZ T RHDX D7:0 Data In D15:81 Data WLWH WHLH T T QVWH WHQX D7:0 Data Out ...

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... CLOX CHOX T ILIH T IHIL T OLOH T OHOL Notes: AT89C5132 24 = -40° to +85°C A Parameter Clock Period Clock High Time Clock Low Time SS Low to Clock edge Input Data Valid to Clock Edge Input Data Hold after Clock Edge Output Data Valid after Clock Edge ...

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... IVCL CLIX MSB IN BIT 6 T CHCH T T CHCX CLCX T T IVCH CHIX T T IVCL CLIX MSB IN BIT 6 T CLOV T CHOV MSB OUT BIT 6 AT89C5132 T CLSH T T CHSH SHSL T CLCH T CHCL T CLOX T T SHOX CHOX 1 LSB IN T CLCH T CHCL LSB IN T CLOX ...

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... SCK (SSCPOL = 0) (output) SCK (SSCPOL = 1) (output) SI (input) SO Port Data (output) Note handled by software using general purpose port pin. 6.3.4 Two-wire Interface 6.3.4.1 Timings Table 17. TWI Interface AC Timing AT89C5132 26 T SLCH T T SLCL CHCH T T CHCX CLCX T CHOV T SLOV T CLOV SLAVE MSB OUT ...

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... CLCL 14·T CLCL 1 μs 0.3 μs will be filtered out. Maxi- CLCL Repeated START condition T ;STA STOP condition su T ;STO su T DAT3 su 0.7 V 0.3 V Tsu;DAT 2 DAT AT89C5132 OUTPUT Min Max (4) 4.0 μs (1) 4.7 μs (4) (1) (4) 4.0 μs (1) (2) - 0.3 μs (3) (4) 20· CLCL RD 1 μs (1) (4) 8·T ...

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... T CLCX T CLCH T CHCL T DVCH T CHDX T CHOX T OVCH 6.3.5.3 Waveforms Figure 6-17. MMC Input Output Waveforms AT89C5132 28 Signals C Clock D Data In O Data Out = -40 to +85°C, CL ≤ 100pF (10 cards) A Parameter Clock Period Clock High Time Clock Low Time Clock Rise Time Clock Fall Time Input Data Valid to Clock High ...

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... Clock Period Clock High Time Clock Low Time Clock Rise Time Clock Fall Time Clock Low to Select Valid Clock Low to Data Valid 32-bit format with kHz. DCLK DSEL Right T CLOV DDAT AT89C5132 Conditions Min Max (1) 325 ...

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... Table 18. Analog to Digital Converter Timing Symbol Definitions 6.3.7.2 Characteristics Table 18. Analog to Digital Converter AC Characteristics V = 2 Symbol T CLCL T EHSH T SHSL DLe ILe OSe Ge Notes: AT89C5132 30 Signals C Clock E Enable (ADEN bit) Start Conversion S (ADSST bit) = -40 to +85°C A Parameter Clock Period Start-up Time Conversion Time Differential non- (1)(2) linearity error ...

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... T CLCL T SHSL Ideal Transfer Curve Center of a Step Integral Non-linearity (ILe) Differential Non-linearity (DLe) 1 LSB (Ideal 1018 1019 1020 1021 1022 1023 1024 AT89C5132 Offset Gain Error Error OSe Ge Example of an Actual Transfer Curve AVIN (LSBideal) 31 ...

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... FDR 6.3.8.3 Waveforms Figure 6-21. Flash Memory – ISP Waveforms Note: Figure 6-22. Flash Memory – Internal Busy Waveforms 6.3.9 External Clock Drive and Logic Level References 6.3.9.1 Definition of Symbols Table 21. External Clock Timing Symbol Definitions AT89C5132 32 Signals S ISP R RST B FBUSY flag = -40° to +85°C A Parameter ...

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... -0.5V for a logic 1 and 0.45V for a logic 0. DD min for a logic 1 and 0.1V LOAD Timing Reference Points V - 0.1V LOAD /V level occurs with AT89C5132 Min CLCH CHCX T CLCX T CLCL OUTPUTS V min IH V max IL max for a logic 0. ...

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... Ordering Information (1) Possible Order Entries Memory Size Part Number (Bytes) AT89C5132-ROTIL 64K Flash AT89C5132-ROTUL 64K Flash Note: 1. PLCC84 package only available for development board. AT89C5132 34 Max Temperature Supply Frequency Voltage Range (MHz) 3V Industrial 40 Industrial & Green Product Package Packing Marking ...

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... Package Information 8.1 TQFP80 4173ES–USB–09/07 AT89C5132 35 ...

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... PLCC84 AT89C5132 36 4173ES–USB–09/07 ...

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... Datasheet Revision History for AT89C5132 9.1 Changes from 4173A-08/02 to 4173B-03/04 1. Suppression of ROM product version. 2. Suppression of TQFP64 package. 9.2 Changes from 4173B-03/04 - 4173C - 07/04 1. Add USB connection schematic in USB section. 2. Add USB termination characteristics in DC Characteristics section. 3. Page access mode clarification in Data Memory section. 9.3 Changes from 4173C-07/04 - 4173D - 01/05 1 ...

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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as compo- nents in applications intended to support or sustain life. ©2007 Atmel Corporation. All rights reserved. Atmel tered trademarks, of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...