AT89LP828 Atmel Corporation, AT89LP828 Datasheet - Page 38

• Manufacturer Part Number: AT89LP828
• Manufacturer: Atmel Corporation

Specifications of AT89LP828

• Flash (kbytes): 8 Kbytes
• Max. Operating Frequency: 25 MHz
• Cpu: 8051-1C
• Max I/o Pins: 30
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.75
• Eeprom (bytes): 1024
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

10.1.4
10.2
38
Port 2 Analog Functions
AT89LP428/828
Push-pull Output
The push-pull output configuration has the same pull-down structure as both the open-drain and
the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port
latch contains a logic “1”. The push-pull mode may be used when more source current is needed
from a port output. The push-pull port configuration is shown in
Figure 10-5. Push-pull Output
The AT89LP428/828 incorporates two analog comparators. In order to give the best analog per-
formance and minimize power consumption, pins that are being used for analog functions must
have both their digital outputs and inputs disabled. Digital outputs are disabled by putting the
port pins into the input-only mode as described in
on P2.4, P2.5, P2.6 and P2.7 are disabled whenever an analog comparator is enabled by setting
the CENA or CENB bits in ACSRA and ACSRB and that pin is configured for input-only mode.
To use an analog input pin as a high-impedance digital input while a comparator is enabled, that
pin should be configured in open-drain mode and the corresponding port register bit should be
set to 1. The analog input pins will always default to input-only mode after reset regardless of the
state of the Tristate-Port User Fuse.
If analog noise immunity is a concern, the P2.4–7 pins should not be used as high speed digital
inputs or outputs while the comparators are enabled.
From Port
Register
Input
Data
PWD
“Port Configuration” on page
V
CC
Figure
10-5.
Port
Pin
35. Digital inputs
3654A–MICRO–8/09