AT90PWM3B Atmel Corporation, AT90PWM3B Datasheet
AT90PWM3B
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AT90PWM3B Summary of contents
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... Low Power Idle, Noise Reduction, and Power Down Modes – Power On Reset and Programmable Brown Out Detection – Flag Array in Bit-programmable I/O Space (4 bytes) ® ® AVR 8-bit Microcontroller 8-bit Microcontroller with 8K Bytes In-System Programmable Flash AT90PWM2 AT90PWM3 AT90PWM2B AT90PWM3B Summary 4317JS–AVR–08/10 ...
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... History Product AT90PWM2 AT90PWM3 AT90PWM2B AT90PWM3B This datasheet deals with product characteristics of AT90PW2 and AT90WM3. It will be updated as soon as characterization will be done. 2. Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max val- ues will be available after the device is characterized ...
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Pin Configurations Figure 3-1. (TXD/DALI/OC0A/SS/MOSI_A) PD3 ADC1/RXD/DALI/ICP1A/SCK_A) PD4 Figure 3-2. (ADC1/RXD/DALI/ICP1A/SCK_A) PD4 4317JS–AVR–08/10 SOIC 24-pin Package (PSCOUT00/XCK/SS_A) PD0 (RESET/OCD) PE0 (PSCIN0/CLKO) PD1 (PSCIN2/OC1A/MISO_A) PD2 VCC GND (MISO/PSCOUT20) PB0 (MOSI/PSCOUT21) PB1 (OC0B/XTAL1) PE1 (ADC0/XTAL2) PE2 SOIC 32-pin Package (PSCOUT00/XCK/SS_A) PD0 ...
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Figure 3-3. (PSCIN2/OC1A/MISO_A) PD2 (TXD/DALI/OC0A/SS/MOSI_A) PD3 3.1 Pin Descriptions : Table 3-1. Pin out description S024 Pin SO32 Pin QFN32 Pin Number Number Number AT90PWM2/3/2B/3B 4 QFN32 (7*7 mm) Package. AT90PWM3/3B QFN 32 1 ...
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Table 3-1. Pin out description (Continued) S024 Pin SO32 Pin QFN32 Pin Number Number Number ...
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Table 3-1. Pin out description (Continued) S024 Pin SO32 Pin QFN32 Pin Number Number Number ...
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Block Diagram Figure 4-1. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in ...
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The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or ...
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Port D (PD7..PD0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D ...
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Register Summary Address Name Bit 7 (0xFF) PICR2H (0xFE) PICR2L (0xFD) PFRC2B PCAE2B (0xFC) PFRC2A PCAE2A (0xFB) PCTL2 PPRE21 (0xFA) PCNF2 PFIFTY2 (0xF9) OCR2RBH (0xF8) OCR2RBL (0xF7) OCR2SBH (0xF6) OCR2SBL (0xF5) OCR2RAH (0xF4) OCR2RAL (0xF3) OCR2SAH (0xF2) OCR2SAL (0xF1) ...
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Address Name Bit 7 (0xBE) Reserved – (0xBD) Reserved – (0xBC) Reserved – (0xBB) Reserved – (0xBA) Reserved – (0xB9) Reserved – (0xB8) Reserved – (0xB7) Reserved – (0xB6) Reserved – (0xB5) Reserved – (0xB4) Reserved – (0xB3) Reserved – ...
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Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB ADHSM (0x7A) ADCSRA ADEN (0x79) ADCH - / ADC9 (0x78) ADCL ADC7 / ADC1 ADC6 / ADC0 (0x77) AMP1CSR AMP1EN (0x76) AMP0CSR AMP0EN (0x75) Reserved – (0x74) Reserved – (0x73) Reserved ...
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Address Name Bit 7 0x1A (0x3A) GPIOR2 GPIOR27 0x19 (0x39) GPIOR1 GPIOR17 0x18 (0x38) Reserved – 0x17 (0x37) Reserved – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – 0x12 (0x32) Reserved – ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr ADC Rd, Rr ADIW Rdl,K SUB Rd, Rr SUBI Rd, K SBC Rd, Rr SBCI Rd, K SBIW Rdl,K AND Rd, Rr ANDI Rd Rd, ...
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Mnemonics Operands BIT AND BIT-TEST INSTRUCTIONS SBI P,b CBI P,b LSL Rd LSR Rd ROL Rd ROR Rd ASR Rd SWAP Rd BSET s BCLR s BST Rr, b BLD Rd, b SEC CLC SEN CLN SEZ CLZ SEI CLI ...
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Mnemonics Operands NOP SLEEP WDR BREAK AT90PWM2/3/2B/3B 16 Description No Operation Sleep (see specific descr. for Sleep function) Watchdog Reset (see specific descr. for WDR/timer) Break For On-chip Debug Only Operation Flags #Clocks None None None None 4317JS–AVR–08/ ...
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... Ordering Code Package AT90PWM3-16SQ SO32 AT90PWM3-16MQT QFN32 AT90PWM3-16MQ QFN32 AT90PWM2-16SQ SO24 AT90PWM3B-16SE SO32 AT90PWM3B-16ME QFN32 AT90PWM2B-16SE SO24 AT90PWM3B-16SU SO32 AT90PWM3B-16MU QFN32 AT90PWM2B-16SU SO24 AT90PWM2/3/2B/3B Operation Range 0°C to Extended (-4 105°C) 0°C to Extended (-4 105°C) 0°C to Extended (-4 105°C) 0°C to Extended (-4 105°C) ...
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Package Information SO24 24-Lead, Small Outline Package SO32 32-Lead, Small Outline Package QFN32 32-Lead, Quad Flat No lead AT90PWM2/3/2B/3B 18 Package Type 4317JS–AVR–08/10 ...
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SO24 4317JS–AVR–08/10 AT90PWM2/3/2B/3B 19 ...
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SO32 AT90PWM2/3/2B/3B 20 4317JS–AVR–08/10 ...
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QFN32 4317JS–AVR–08/10 AT90PWM2/3/2B/3B 21 ...
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AT90PWM2/3/2B/3B 22 4317JS–AVR–08/10 ...
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Errata 9.1 AT90PWM2&3 Rev. A (Mask Revision) • PGM: PSCxRB Fuse • PSC: Prescaler • PSC: PAOCnA and PAOCnB Register Bits (Asynchronous output control) • PSC: PEVxA/B Flag Bits • PSC: Output Polarity in Centered Mode • PSC: Output ...
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PSC: Output Polarity in Centered Mode In centered mode, PSCOUTn1 outputs are not inverted, so they are active at the same time as PSCOUTn0. Workaround: Use an external inverter (or a driver with inverting output) to drive the load ...
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The comparator output toggles at the comparator clock frequency when the voltage differ- ence between both inputs is lower than the offset. This may occur when comparing signal with small slew rate. Work around: This effect normally do not impact ...
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Use, when Vcc=5V, Vref below Vcc-1V. Or, when Vref=Vcc=5V, do not uses codes above 800. 4. DAC Update in Autotrig mode If the cpu writes in DACH register at the same instant that the selected trigger source occurs and DAC ...
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Datasheet Revision History for AT90PWM2/2B/3/3B Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 10.1 Changes from 4317A- to 4317B 1. ...
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PSC : the Balance Flank Width Modulation is done On-Time 1 rather than On-Time 0 (correction of figures) 4. Updated 5. Update of the 10.8 Changes from 4317H to 4317I 1. Updated 2. Updated 3. Updated 4. Updated 5. ...
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