AT90USB82 Atmel Corporation, AT90USB82 Datasheet - Page 6

• Manufacturer Part Number: AT90USB82
• Manufacturer: Atmel Corporation

Specifications of AT90USB82

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
6
AT90USB82/162
Port C (PC7..PC0)
Port D (PD7..PD0)
D-/SDATA
D+/SCK
UGND
UVCC
UCAP
RESET/PC1/dW
XTAL1
XTAL2/PC0
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of various special features of the AT90USB82/162 as listed on
page
Port D serves as analog inputs to the analog comparator.
Port D also serves as an 8-bit bi-directional I/O port, if the analog comparator is not used (con-
cerns PD2/PD1 pins). Port pins can provide internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
USB Full Speed Negative Data Upstream Port / Data port for PS/2
USB Full Speed Positive Data Upstream Port / Clock port for PS/2
USB Ground.
USB Pads Internal Regulator Input supply voltage.
USB Pads Internal Regulator Output supply voltage. Should be connected to an external capac-
itor (1µF).
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
pulses are not guaranteed to generate a reset. This pin alternatively serves as debugWire chan-
nel or as generic I/O. The configuration depends on the fuses RSTDISBL and DWEN.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier if enabled by Fuse. Also serves as a generic I/O.
76.
Section
7707FS–AVR–11/10
9.. Shorter