ATmega325A Atmel Corporation, ATmega325A Datasheet - Page 94

• Manufacturer Part Number: ATmega325A
• Manufacturer: Atmel Corporation

Specifications of ATmega325A

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15. 8-bit Timer/Counter0 with PWM
15.1
15.2
15.2.1
8285D–AVR–06/11
Features
Overview
Definitions
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
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Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram is shown in
Configurations” on page
shown in bold. The device-specific I/O Register and bit locations are listed in the
Description” on page
Figure 15-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare unit number, in this case unit A. However, when using the register or bit defines in a
program, the precise form must be used, i.e., TCNT0 for accessing Timer/Counter0 counter
value and so on.
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
Timer/Counter
TCNTn
OCRn
=
105.
2. CPU accessible I/O Registers, including I/O bits and I/O pins, are
direction
count
clear
BOTTOM
Figure
= 0
15-1. For the actual placement of I/O pins, refer to
Control Logic
=
TCCRn
TOP
0xFF
clk
Tn
Generation
Waveform
Clock Select
( From Prescaler )
Detector
Edge
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
”Register
”Pin
94