ATmega645 Atmel Corporation, ATmega645 Datasheet - Page 205
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ATmega645
Manufacturer Part Number
ATmega645
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATmega645-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega645-16MU
Manufacturer:
ATECH
Quantity:
729
Part Number:
ATmega645-16MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega6450-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega6450P-AU
Manufacturer:
Atmel
Quantity:
360
Company:
Part Number:
ATmega6450P-AUR
Manufacturer:
Atmel
Quantity:
1 500
Part Number:
ATmega6450V-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega6450V-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2570N–AVR–05/11
with Auto triggering from a source other than the ADC Conversion Complete, each conversion
will require 25 ADC clocks. This is because the ADC must be disabled and re-enabled after
every conversion.
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. For a summary of conversion times, see
Figure 23-4. ADC Timing Diagram, First Conversion (Single Conversion Mode)
Figure 23-5. ADC Timing Diagram, Single Conversion
Figure 23-6. ADC Timing Diagram, Auto Triggered Conversion
Cycle Number
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADEN
ADSC
ADIF
ADCH
ADCL
Prescaler
Reset
1
1
2
MUX and REFS
Update
MUX and REFS
Update
1
2
MUX and REFS
Update
12
2
3
13
Sample & Hold
3
4
Sample &
Hold
14
4
5
15
5
6
Sample & Hold
16
6
First Conversion
17
7
ATmega325/3250/645/6450
One Conversion
18
7
8
One Conversion
19
8
9
20
9
10
Conversion
Complete
21
10
Conversion
11
Complete
22
Conversion
Complete
11
23
12
24
12
13
25
13
Sign and MSB of Result
Sign and MSB of Result
Table
LSB of Result
Next Conversion
Sign and MSB of Result
1
Next
Conversion
1
LSB of Result
LSB of Result
2
2
23-1.
MUX and REFS
Update
Next Conversion
MUX and REFS
Update
1
Prescaler
Reset
3
3
2
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