ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 146

• Manufacturer Part Number: ATmega64M1
• Manufacturer: Atmel Corporation

Specifications of ATmega64M1

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.15 Interrupts
17.15.1
17.15.2
17.16 Register Description
17.16.1
146
ATmega16M1/32M1/64M1
Interrupt Vector
PSC Interrupt Vectors in ATmega16M1/32M1/64M1
POC – PSC Output Configuration
Table 17-6.
T h i s s e c t i o n d e s c r i b e s t h e s p e c i f i c s o f t h e i n t e r r u p t h a n d l i n g a s p e r f o r m e d i n
ATmega16M1/32M1/64M1.
PSC provides 2 interrupt vectors:
Table 17-7.
Registers are explained for PSC module 0. They are identical for module 1 and module 2.
Bit
Read/Write
Initial Value
• Bit 7:6 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 5 – POEN2B: PSC Output 2B Enable
When this bit is clear, I/O pin affected to PSCOUT2B acts as a standard port.
PCLKSELn
0
1
1
1
1
• PSC_End (End of Cycle): When enabled and when a match with POCR_RB occurs
• PSC_Fault (Fault Event): When enabled and when a PSC input detects a Fault event
Vector
No.
5
6
-
-
-
Program
Address
0x0004
0x0005
Output Clock versus Selection and Prescaler
PSC Interrupt Vectors
R/W
-
-
-
7
0
-
PPREn1
1
0
0
1
1
Source
PSC_Fault
PSC_End
R/W
6
0
-
POEN2B
-
-
-
R/W
5
0
PPREn0
1
0
1
0
1
POEN2A
R/W
4
0
Interrupt Definition
-
PSC Fault event
PSC End of Cycle
-
-
POEN1B
R/W
3
0
CLKPSCn output
CLK I/O / 256
CLK PLL
CLK PLL / 4
CLK PLL / 32
CLK PLL / 256
POEN1A
R/W
2
0
POEN0B
R/W
1
0
POEN0A
R/W
0
0
8209D–AVR–11/10
POC