ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 284

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ATUC64L4U

Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64L4U

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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284
AVR32
PREF – Cache Prefetch
Architecture revision:
Architecture revision1 and higher.
Description
This instruction allows the programmer to explicitly state that the cache should prefetch the
specified line. The memory system treats this instruction in an implementation-dependent man-
ner, and implementations without cache treats the instruction as a NOP. A prefetch instruction
never reduces the performance of the system. If the prefetch instruction performs an action that
would lower the system performance, it is treated as a NOP. For example, if the prefetch instruc-
tion is about to generate an addressing exception, the instruction is cancelled and no exception
is taken.
Operation:
I.
Syntax:
Operands:
I.
Status Flags:
Opcode:
31
1
15
Prefetch cache line containing the address (Rp + SE(disp16)).
pref
p ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}
Q:
V:
N:
Z:
C:
1
29
1
Rp[disp]
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
28
1
0
0
1
0
disp16
0
0
0
20
1
19
Rp
32000D–04/2011
0
16

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