SAM3N2C Atmel Corporation, SAM3N2C Datasheet - Page 44

• Manufacturer Part Number: SAM3N2C
• Manufacturer: Atmel Corporation

Specifications of SAM3N2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.4.3.1
10.4.3.2
10.4.3.3
44
SAM3N
General-purpose registers
Stack Pointer
Link Register
Table 10-2.
1.
2.
R0-R12 are 32-bit general-purpose registers for data operations.
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register indi-
cates the stack pointer to use:
On reset, the processor loads the MSP with the value from address 0x00000000.
The Link Register (LR) is register R14. It stores the return information for subroutines, function
calls, and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF
Name
R0-R12
MSP
PSP
LR
PC
PSR
ASPR
IPSR
EPSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
• 0 = Main Stack Pointer (MSP). This is the reset value.
• 1 = Process Stack Pointer (PSP).
Describes access type during program execution in thread mode and Handler mode. Debug
An entry of Either means privileged and unprivileged software can access the register.
access can differ.
Core register set summary
Type
RW
RW
RW
RW
RW
RW
RW
RO
RO
RW
RW
RW
RW
(1)
Either
Privileged
Either
Either
Either
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Required
privilege
Either
Privileged
(2)
Reset
value
Unknown
See
description
Unknown
0xFFFFFFFF
See
description
0x01000000
0x00000000
0x00000000
0x01000000
0x00000000
0x00000000
0x00000000
0x00000000
Description
“General-purpose registers” on page 44
“Stack Pointer” on page 44
“Stack Pointer” on page 44
“Link Register” on page 44
“Program Counter” on page 45
“Program Status Register” on page 46
“Application Program Status Register” on
page 47
“Interrupt Program Status Register” on page
48
“Execution Program Status Register” on page
49
“Priority Mask Register” on page 50
“Fault Mask Register” on page 50
“Base Priority Mask Register” on page 51
“CONTROL register” on page 52
11011A–ATARM–04-Oct-10
.