SAM7X128 Atmel Corporation, SAM7X128 Datasheet - Page 165
SAM7X128
Manufacturer Part Number
SAM7X128
Description
Manufacturer
Atmel Corporation
Specifications of SAM7X128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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6.15
ARM DDI 0029G
CP
register
status
Single
register
ready
Single
register
not ready
n registers
(n>1)
ready
Coprocessor data transfer from coprocessor to memory
Cycle
1
2
-
1
2
•
b
b+1
1
2
•
n
n+1
Address
pc+8
alu
pc+12
pc+8
pc+8
pc+8
pc+8
alu
pc+12
pc+8
alu
alu+•
alu+•
alu+•
pc+12
The ARM7TDMI processor controls these instructions in the same way as for memory
to coprocessor transfers, with the exception that the nRW line is inverted during the
transfer cycle.
The cycle timings are listed in Table 6-18 where:
•
•
b represents the busy cycles
n represents the number of registers.
MAS
[1:0]
2
2
-
2
2
2
2
2
2
2
2
2
2
Copyright © 1994-2001. All rights reserved.
Table 6-18 coprocessor data transfer instruction cycle operations
nRW
0
1
-
0
0
0
0
1
0
1
1
1
1
Data
(pc+8)
CPdata
-
(pc+8)
-
-
-
CPdata
(pc+8)
CPdata
CPdata
CPdata
CPdata
nMREQ
0
0
-
1
1
1
0
0
0
0
0
0
0
SEQ
0
0
-
0
0
0
0
0
0
1
1
1
0
nOPC
0
1
-
0
1
1
1
1
0
1
1
1
1
Instruction Cycle Timings
nCPI
0
1
-
0
0
0
0
1
0
1
1
1
1
CPA
0
1
-
0
0
0
0
1
0
0
0
0
1
CPB
0
1
-
1
1
1
0
1
0
0
0
0
1
6-23
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