SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 25
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
8.1.2.2
8.2
8.2.1
8.2.1.1
6249HS–ATARM–27-Jul-09
External Memories
External Bus Interfaces
BMS = 0, Boot on External Memory
External Bus Interface 0
The customer-programmed software must perform a complete configuration.
To speed up the boot sequence when booting at 32 kHz EBI0 CS0 (BMS=0) the user must:
The external memories are accessed through the External Bus Interfaces 0 and 1. Each Chip
Select line has a 256 Mbyte memory area assigned.
Refer to
The AT91SAM9263 features two External Bus Interfaces to offer more bandwidth to the system
and to prevent bottlenecks while accessing external memories.
• Interface with SAM-BA
• Boot at slow clock
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
1. Program the PMC (main oscillator enable or bypass mode).
2. Program and Start the PLL.
3. Reprogram the SMC setup, cycle, hold, mode timings registers for CS0 to adapt them
4. Switch the main clock to the new value.
• Integrates three External Memory Controllers:
• Additional logic for NAND Flash and CompactFlash
• Optional Full 32-bit External Data Bus
• Up to 26-bit Address Bus (up to 64 Mbytes linear per chip select)
• Up to 6 Chip Selects, Configurable Assignment:
• Optimized for Application Memory Space
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
– SD Card
– NAND Flash
– SPI DataFlash
– Serial communication on a DBGU
– USB Bulk Device Port
to the new clock.
– Static Memory Controller
– SDRAM Controller
– ECC Controller
– Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash support
Figure 8-1 on page
®
and Serial Flash connected on NPCS0 of the SPI0
®
Graphic User Interface to enable code loading via:
21.
AT91SAM9263
25