SAM3N00B Atmel Corporation, SAM3N00B Datasheet - Page 74
SAM3N00B
Manufacturer Part Number
SAM3N00B
Description
Manufacturer
Atmel Corporation
- Current page: 74 of 752
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10.8.3
74
SAM3N
Power management programming hints
In addition, if the SEVONPEND bit in the SCR is set to 1, any new pending interrupt triggers an
event and wakes up the processor, even if the interrupt is disabled or has insufficient priority to
cause exception entry. For more information about the SCR see
page
ANSI C cannot directly generate the WFI and WFE instructions. The CMSIS provides the follow-
ing intrinsic functions for these instructions:
void __WFE(void) // Wait for Event
void __WFE(void) // Wait for Interrupt
173.
“System Control Register” on
11011A–ATARM–04-Oct-10
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