CLC410AJE National Semiconductor, CLC410AJE Datasheet - Page 9

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CLC410AJE

Manufacturer Part Number
CLC410AJE
Description
IC OP AMP VIDEO 8-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of CLC410AJE

Applications
Current Feedback
Number Of Circuits
1
-3db Bandwidth
200MHz
Slew Rate
700 V/µs
Current - Supply
16mA
Current - Output / Channel
70mA
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*CLC410AJE

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Application Division
During disable, supply current drops to approximately 4mA
and the inverting input and output pin impedances become
200k \0.5pF each. The total impedance that a disabled
amplifier and its associated feedback network presents to
the analog bus is determined from Figure 6 . For example, at
a non-inverting gain of 1, the output impedance at video
frequencies is 100k \1pF since the 250
is a negligible impedance. Similarly, output impedance is
500 \0.5pF at a non-inverting gain of 2 (with R
250 ).
Differential Gain and Phase
Plots on the preceding page illustrate the differential gain
and phase performance of the CLC410 at both 3.58MHz and
4.43MHz. Application Note OA-08 presents a measurement
technique for measuring the very low differential gain and
phase of the CLC410. Observe that the gain and phase
errors remain low even as the output loading increases,
making the device attractive for driving multiple video out-
puts.
Understanding the Loop Gain
The CLC410 is a current-feedback op amp. Referring to the
equivalent circuit of Figure 7 , any current flowing in the
inverting input is amplified to a voltage at the output through
the transimpedance gain shown below. This Z(s) is analo-
gous to the open-loop gain of a voltage feedback amplifier.
FIGURE 5. Equivalent of DIS input
FIGURE 6.
01274917
(Continued)
feedback resistor
01274918
f
= R
g
=
9
Developing the non-inverting frequency response for the
topology of Figure 3 yields:
where LG is the loop gain defined by,
Equation 1 has a form identical to that for a voltage feedback
amplifier with the differences occurring in the LG expression,
eq.2. For an idealized treatment, set Z
very simple LG=Z(s)/R
for the case where Z
AN300-1). Using the Z(s) (open-loop transimpedance gain)
plot shown on the previous page and dividing by the recom-
mended R
result, Equation 1 shows that the closed-loop gain at DC is
very close to (1+R
At higher frequencies, the roll-off of Z(s) determines the
closed-loop frequency response which, ideally, is dependent
only on R
pages are therefore valid only for the specified R
250 . Increasing R
Open-Loop Transimpedance Gain, Z(s)
FIGURE 7. Current Feedback Topology
f
. The specifications reported on the previous
f
= 250 , yields a large loop gain at DC. As a
f
/R
f
from 250
g
).
i
f
(Derivation of the transfer function
= 0 is given in Application Note
will decrease the loop gain
i
= 0 which results in a
01274920
01274919
www.national.com
f
(1)
(2)
=

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