DS2165Q Maxim Integrated Products, DS2165Q Datasheet - Page 12
![IC PROC ADPCM 16/24/32K 28-PLCC](/photos/6/52/65249/406-28-plcc_sml.jpg)
DS2165Q
Manufacturer Part Number
DS2165Q
Description
IC PROC ADPCM 16/24/32K 28-PLCC
Manufacturer
Maxim Integrated Products
Type
ADPCM Processorr
Datasheet
1.DS2165Q.pdf
(17 pages)
Specifications of DS2165Q
Mounting Type
Surface Mount
Package / Case
28-LCC, 28-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Applications
-
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DS2165Q
TIME SLOT RESTRICTIONS
Under certain conditions, the DS2165Q does contain some restrictions on the output time slots that are
available. These restrictions are covered in detail in a separate application note. No restrictions occur if
the DS2165Q is operated in the hardware mode.
INPUT TO OUTPUT DELAY
With all three compressions algorithms, the total delay, from the time the PCM data sample is captured
by the DS2165Q to the time it is output, is always less than 375ms. The exact delay is determined by the
input and output time slots selected for each channel.
CHANNEL ASSOCIATED SIGNALING
The DS2165Q supports Channel Associated Signaling (CAS) through its ability to automatically change
from the 32kbps compression algorithm to the 24kbps algorithm. If the DS2165Q is configured to
perform the 32kbps algorithm, then in both the hardware and software mode it senses the frame sync
inputs (FSX and FSY) for a double-wide frame-sync pulse. Whenever the DS2165Q receives a double-
wide pulse, it automatically switches from the 32kbps algorithm to the 24kbps algorithm. Switching to
the 24kbps algorithm allows the user to insert signaling data into the LSB bit position of the ADPCM
output because this bit does not contain any useful speech information.
ON-THE-FLY ALGORITHM SELECTION
In the software mode, the user can switch between the three available algorithms on-the-fly. That is, the
DS2165Q does not need to be reset or stopped to make the change from one algorithm to another. The
DS2165Q reads the control register before it starts to process each PCM or ADPCM sample. If the user
wishes to switch algorithms, then the control register must be updated by the serial port before the first
input sample to be processed with the new algorithm arrives at either XIN or YIN. The PCM and
ACPCM outputs tri-state during register updates.
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