IRS20954SPBF International Rectifier, IRS20954SPBF Datasheet
IRS20954SPBF
Specifications of IRS20954SPBF
Related parts for IRS20954SPBF
IRS20954SPBF Summary of contents
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... Please use IRS20957SPBF. Protected Digital Audio Driver IRS 20954 S VDD CSH VB CSD VSS NC NC VCC VREF OCSET LO COM DT IRS20954SPBF Data Sheet No. PD60276 IRS20954SPBF Product Summary V (max) OFFSET Io+ Gate driver ns, 25 ns, Selectable Deadtime Propagation delay OC protection delay Package +B Vcc ± 100 V 1.0 A 1.2 A ...
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... Note2: For the rising and falling edges of step signal Note3: V ramps up from 200 V. ss www.irf.com Please use IRS20957SPBF. Definition - contain internal shunt zener diodes. Please note that the voltage = 200 V. ss IRS20954SPBF Min. Max. Units -0.3 220 V - Vs-0.3 V +0.3 B Vs-0 ...
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... V OREF , =25 °C unless otherwise specified nF, and Min. Typ. 8.4 8.9 8.2 8 19.8 20.8 8.0 8.5 7.8 8 19.8 20.8 8.2 8.7 7.7 8 9.9 10 IRS20954SPBF and COM offset s =12 V. Min. Max. V + Note 1 100 200 0.3 0.8 ...
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... S 1.0+ Vs 1.2+ Vs CSH 100 50 100 - - > CSH - - - - 0.8 1.0 1.0 1 105 - 90 - 105 - IRS20954SPBF Max. Units Test Conditions - V 1 µ 5.6 I OREF 1.4 OCSET=1.2 V, Fig. 13 Vs=200 V, V 1.4+ Vs Fig 150 µ 150 1 Fig. 2 µs 1 Fig Fig PW<10 µ =12 V, PW<10 µ ...
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... Please use IRS20957SPBF. Min. Typ. 0.51·(V ) 0.57·(V cc 0.32·(V ) 0.36·(V cc 0.21·(V ) 0.23·(V cc Description 1 16 VDD 2 15 CSD VSS 20954 VREF IRS20954SPBF Max. Units Test Conditions ) 0.63·( 0.40·( 0.25·(Vv cc CSH VCC LO COM 5 ...
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... PROTECTION CONTROL LEVEL www.irf.com Please use IRS20957SPBF. FLOATING INPUT UV DETECT INPUT LOGIC HV LEVEL HV SHIFT FLOATING HIGH SIDE LEVEL SHIFT 5V REG DEAD-TIME SD HV SHIFT HV SHIFT IRS20954SPBF CSH UV DETECT VB UV HIGH Q SIDE LEVEL SHIFT VCC UV DETECT LO DT COM LOW SIDE CS OCSET 5.1V REFERENCE ...
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... Not recommended for new designs. Figure 1: Switching Time Waveform Definitions CSD HO/LO Figure 2: CSD to Shutdown Waveform Definitions www.irf.com Please use IRS20957SPBF. Vth1 t SD IRS20954SPBF 90% 7 ...
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... Not recommended for new designs. CSD HO/LO Figure 3: CSH to Shutdown Waveform Definitions VS LO Figure 4: V www.irf.com Please use IRS20957SPBF. Vth1 THCSL t OCL > Shutdown Waveform Definitions s TH,SCL IRS20954SPBF 90% 90% 8 ...
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... HV IN LEVEL SHIFT CSD VSS Floating Input Isolation Floating Bias 0V – 200V COM IRS20954 Figure 5: Floating PWM Input Structure . t , the output signal from the COMP2 resets the OCL. th2 . t , the COMP1 flips and enables shutdown signal released. th1 IRS20954SPBF PROTECTION , CSD DD 9 ...
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... Figure 6: Over-Current Protection Timing Chart respectively to turn the power MOSFET off. S Vth1 ` COMP1 COMP2 R Vth2 HV FLOATING INPUT LEVEL SHIFT UVLO(VCC) Figure 7: Shutdown Functional Block Diagram IRS20954SPBF UVLO(VB) OC DET ( FLOATING HIGH SIDE LEVEL LEVEL SHIFT SHIFT LOW SIDE OC DET ( PWM DEAD TIME ...
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... V. The start-up time [s] [F] is charge/discharge current in CSD pin, 100 µA. is supply voltage respect to V SS. should be long enough to avoid over heating and failure of the MOSFET from PR , for example with a transistor shown in Fig. 9, the IRS20954 enters th2 IRS20954SPBF CSH VCC LO COM given as from power- ...
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... SHUTDOWN VSS NC VREF OCSET DT Figure 9: Shutdown Input VDD <10k CSD IN RESET VSS NC VREF OCSET DT Figure 10: Latched Protection Configuration Figure 11: Interfacing System Controller IRS20954SPBF CSH VCC LO COM . Minimum reset pulse width required th2 CSH VCC LO COM Once measured current gets exceeded pre- ...
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... VS HV LEVEL SHIFT VCC UV LO COM LOW SIDE CS OCSET VREF Figure 12: Bi-Directional Over-Current Protection during the low-side MOFET on state. In order to avoid incorrect DS OCREF VS 0.5mA 5. OCSET Comparator COM LO LO IRS20954 IRS20954SPBF Dbs Q1 OUT Vcc pin turning on the supply a reference REF fluctuations OUT ...
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... OCH The reverse blocking diode D1 is forward biased kΩ resistor R1 when the high-side MOSFET is on. www.irf.com Please use IRS20957SPBF. Figure 13: Low-Side Over-Current Sensing is: and R D IRS20954SPBF DS pin which is the source S in the high-side MOSFET. V DS(ON) CSH with CSH and Vs can be written ...
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... Also the reverse recovery time needs fast as the bootstrap charging diode. The Philips BAV21W, 200 high speed switching diode, is more than sufficient. www.irf.com Please use IRS20957SPBF. R2 CSH Vcc LO of 100 mΩ, the component values of R2 and R3 are calculated as: DS(ON) Ω − the high-side MOSFET. V DS(ON) IRS20954SPBF OUT forward voltage of reverse blocking diode ...
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... Fig. 15. The fall time of MOSFET gate voltage must be subtracted from the deadtime value in the datasheet to determine the effective dead time of a Class D audio amplifier. (Effective deadtime) = (Deadtime in datasheet) – (fall time, t www.irf.com Please use IRS20957SPBF. of 100 m DS(ON) = 3.0 V Ω IRS20954SPBF , the OCSET voltage set 30 A Ω OCSET 16 ...
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... Fig. 16 below. Dead- time 15nS 25nS 35nS 45nS . www.irf.com Please use IRS20957SPBF. 90% Effective dead-time HO (or LO) 10 (or HO) Dead- time Figure 15: Effective Deadtime 0.23 xVcc 0.36 xVcc 0.57 xVcc Figure 16: Deadtime Settings vs. V IRS20954SPBF 10% , negating the need of using a precise Vcc Voltage shorter f 17 ...
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... DT4 Open <10 kΩ kΩ supply current I DD (Static) (zener bias) therefore is: is 1.18 mA. A condition using 50 V power supply DD at static state conditions such as a condition with no PWM DDZ, IRS20954SPBF DT/SD voltage ( 0.46 0.29 COM can be estimated by: ...
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... NC VCC VREF LO OCSET COM DT Figure 18: Supplying V and V . Advantage of this scheme is to eliminate the minimum duration required B S Figure 19: Bootstrap Supply Pre-Charging IRS20954SPBF +B Vcc 12V - and V whether the voltages are above the Under released, CSD pin resets power-on timer. At the CC pin by utilizing an ...
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... A standard recovery 1 A diode such as 1N4002 is sufficient in most cases for this SS purpose. www.irf.com Please use IRS20957SPBF. , shutdown logic enables LO and HO. The OC detection blocks th1 and V are released Figure 20: IRS20954 Power-Down Timing Chart voltage to damage the IRS20954 recommended to have a diode to clamp potential IRS20954SPBF 20 ...
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... Qg is total gate charge of low-side MOSFET Dissipation in High-side HIGH The dissipation in high-side includes loss from logic circuitry and loss from driving LO and is given by; www.irf.com Please use IRS20957SPBF. Figure 21: Negative V Clamping SS voltage. DD from. DD from V . +BUS , refer to Supplying V section above. DD ⎞ R ⎟ O ⎟ ⎠ (int) IRS20954SPBF 21 ...
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... Qg is total gate charge of high-side MOSFET. Then, total dissipation Pd is given by MID LOW HIGH Estimated Tj from the thermal resistance between ambient and junction temperature, Rth = ⋅ + < ° T Rth P T 150 www.irf.com Please use IRS20957SPBF. ⎞ R ⎟ O ⎟ ⎠ (int) IRS20954SPBF ; JA 22 ...
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... CONTROLLING DIMENSION. MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETER [INCHES] 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AC 5. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE 6. DIMENSION DOES NOT INCLUDE MOLD PROTUSIONS. MOLD PROTUSIONS SHALL NOT EXCEED 0.15 [.006] www.irf.com Please use IRS20957SPBF. 16-Lead SOIC (narrow body) IRS20954SPBF 23 ...
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... Max 329.60 330.25 12.976 20.95 21.45 0.824 12.80 13.20 0.503 1.95 2.45 0.767 98.00 102.00 3.858 n/a 22.40 18.50 21.10 0.728 16.40 18.40 0.645 IRS20954SPBF Imperial Min Max 0.318 0.161 0.641 0.299 0.260 0.409 n/a 0.062 D A Imperial Min Max 13.001 ...
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... WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 www.irf.com Please use IRS20957SPBF. ORDER INFORMATION 16-Lead SOIC IRS20954SPbF 16-Lead SOIC Tape & Reel IRS20954STRPbF This product has been designed and qualified for the industrial level. Qualification standards can be found at ...