PSMN8R0-30YLC NXP Semiconductors, PSMN8R0-30YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN8R0-30YLC

Manufacturer Part Number
PSMN8R0-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN8R0-30YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
(m)
R
DS on
30
25
20
15
10
5
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
20
Q
GS1
2.8
I
Q
D
GS
N-channel 30 V 7.9 mΩ logic level MOSFET in LFPAK using NextPower technology
Q
GS2
3.0
40
Q
G(tot)
Q
V
GD
GS
(V) = 3.5
60
All information provided in this document is subject to legal disclaimers.
003aaa508
003a a g160
4.5
10
I
D
(A)
Rev. 2 — 1 September 2011
80
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
a
(V)
GS
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
0
5
PSMN8R0-30YLC
60
10
V
DS
15V
4.5V
= 6V
24V
120
15
© NXP B.V. 2011. All rights reserved.
V
Q
003a a g162
003a a g161
GS
T
G
j
=10V
(nC)
(C)
180
20
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