EP4S40G2F40I3N Altera Corporation, EP4S40G2F40I3N Datasheet - Page 70
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EP4S40G2F40I3N
Manufacturer Part Number
EP4S40G2F40I3N
Description
IC STRATIX IV FPGA 230K 1517FBGA
Manufacturer
Altera Corporation
Series
STRATIX® IV GTr
Datasheet
1.EP4SGX70DF29C4N.pdf
(80 pages)
Specifications of EP4S40G2F40I3N
Number Of Logic Elements/cells
228000
Number Of Labs/clbs
9120
Total Ram Bits
17544192
Number Of I /o
654
Number Of Gates
-
Voltage - Supply
0.92 V ~ 0.98 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-BBGA
Lead Free Status
Lead free
Rohs Status
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4S40G2F40I3N
Manufacturer:
ALTERA
Quantity:
885
1–62
Table 1–51. IOE Programmable Delay for Stratix IV Devices
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Notes to
(1) You can set this value in the Quartus II software by selecting D1, D2, D3, D4, D5, and D6 in the Assignment Name column.
(2) Minimum offset does not include the intrinsic delay.
(3) For the EP4SGX530 device density, the IOE programmable delays have an additional 5% maximum offset.
Parameter
D1
D2
D3
D4
D5
D6
(1)
Table
Programmable IOE Delay
Programmable Output Buffer Delay
1–51:
Available
Settings
16
16
16
8
8
8
Table 1–51
Table 1–52
of the output buffer. The default delay is 0 ps.
Table 1–52. Programmable Output Buffer Delay
D
Note to
(1) You can set the programmable output buffer delay in the Quartus II software by setting the Output Buffer Delay
OUTBUF
Min Offset
Control assignment to either positive, negative, or both edges, with the specific values stated here (in ps) for the
Output Buffer Delay assignment.
(2)
Table
0
0
0
0
0
0
Symbol
lists the Stratix IV IOE programmable delay settings.
lists the delay chain settings that control the rising and falling edge delays
1–52:
Industrial/
Military
0.462
0.234
1.700
0.508
0.472
0.186
Fast Model
Rising and/or falling edge
delay
Commercial
0.505
0.232
1.769
0.554
0.500
0.195
(3)
Parameter
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
C2
0.732
0.337
2.695
0.813
0.747
0.294
(Note 1)
(3)
0.795
0.372
2.927
0.882
0.799
0.319
C3
0 (default)
0.857
0.407
3.157
0.952
0.875
0.345
Typical
C4
Slow Model
100
150
December 2011 Altera Corporation
50
I3/M3
0.801
0.371
2.948
0.889
0.817
0.321
0.864
0.405
3.178
0.959
0.882
0.347
I4
Unit
ps
ps
ps
ps
I/O Timing
Unit
ns
ns
ns
ns
ns
ns