STR912FAW42 STMicroelectronics, STR912FAW42 Datasheet - Page 78
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STR912FAW42
Manufacturer Part Number
STR912FAW42
Description
32-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.STR911FAW47.pdf
(102 pages)
Specifications of STR912FAW42
Arm966e-s Risc Core
Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)
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Electrical characteristics
Table 35.
78/102
Symbol
t
t
t
t
t
WCR
WDS
t
WAS
t
AAH
AAS
WP
AW
WRn to CSn
inactive
Write address
setup time
Write data setup
time
Write pulse
width
ALE pulse width
Address to ALE
setup time
Address to ALE
hold time
Parameter
Mux write
Figure 20. Mux write diagram
Mux write times
EMI_A D[15:0]
EMI_WRHn
EMI_WRLn
EMI_CSxn
EMI_A [23:16]
EMI_A LE
((WSTWEN - ALE_LENGTH) x t
((WSTWR-WSTWEN + 1) x t
(ALE_LENGTH x t
(ALE_LENGTH x t
(WSTWEN + 1/2) x
(t
(t
t
BCLK
BCLK
BCLK
t
t
Min
AA S
AW
/2) - 1 ns
/2) - 2ns
ns
Doc ID 13495 Rev 6
- 2.5 ns
A ddress
BCLK
BCLK
t
W AS
)- 3.5 ns
)- 3.5 ns
BCLK
BCLK
) - 1 ns ((WSTWR-WSTWEN + 1) x t
A ddress
t
AA H
) - 2
Value
((WSTWEN - ALE_LENGTH) x t
t
W DS
(ALE_LENGTH x t
(ALE_LENGTH x t
Data
(WSTWEN + 1/2) x
t
W P
(t
(t
BCLK
BCLK
t
BCLK
Max
/2) + 2 ns
/2) + 2ns
t
W CR
+ 2 ns
STR91xFAxxx
BCLK
BCLK
BCLK)
BCLK
)
)
+ 1.5 ns
) + 1 ns
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