STR911FAW46 STMicroelectronics, STR911FAW46 Datasheet - Page 76

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STR911FAW46

Manufacturer Part Number
STR911FAW46
Description
ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
Manufacturer
STMicroelectronics
Datasheet

Specifications of STR911FAW46

Arm966e-s Risc Core
Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)

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Electrical characteristics
7.11
7.11.1
Table 33.
76/102
Symbol
t
t
t
WCR
WDS
t
WAS
WP
WRn to CSn
inactive
Write address setup
time
Write data setup
time
Write pulse width
EMI non-mux write operation
External memory bus timings
V
Table 32.
1. The internal EMI Bus clock signal is available externally only on LFBGA144 packages (ball M8), and not
2. EMI_ratio =1/ 2 by default (can be programmed to be 1 by setting the proper bits in the SCU_CLKCNTR
Asynchronous mode
Non Mux Write
Figure 18. Non-mux write timings
Parameter
DDQ
EMI_BWR_WRLn
EMI_CSxn
EMI_A[15:0]
available on LQFP packages.
register)
EMI_D[7:0]
= 2.7 - 3.6 V, V
Symbol
t
BCLK
EMI bus clock period
(WSTWR-WSTWEN + 1) x t
((WSTWEN + 1/2) x t
((WSTWEN + 1/2) x t
DD
= 1.65 - 2 V, T
(t
EMI bus clock period
BCLK
Doc ID 13495 Rev 6
Min
/2) - 2 ns
t
t
WDS
WAS
Parameter
A
BCLK
BCLK
= -40 / 85 °C, C
BCLK
) - 5 ns
) - 2 ns
Address
Data
- 1 ns (WSTWR-WSTWEN + 1) x t
(1)
Value
L
= 30 pF unless otherwise specified.
((WSTWEN + 1/2) x t
t
((WSTWEN + 1/2) x t
WP
(t
1 /(f
BCLK
HCLK
Max
/2) + 2 ns
Value
x EMI_ratio)
t
WCR
BCLK
STR91xFAxxx
(2)
BCLK
BCLK
) + 1 ns
)
+ 1.5 ns

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