DS1225AB Maxim, DS1225AB Datasheet - Page 2

• Manufacturer Part Number: DS1225AB
• Description: The DS1225AB and DS1225AD are 65,536-bit, fully static, nonvolatile (NV) SRAMs organized as 8192 words by 8 bits
• Manufacturer: Maxim

READ MODE
The DS1225AB and DS1225AD execute a read cycle whenever WE (Write Enable) is inactive (high) and
address inputs (A
available to the eight data output drivers within t
stable, providing that CE and OE access times are also satisfied. If CE and OE access times are not
satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is
either t
WRITE MODE
The DS1225AB and DS1225AD execute a write cycle whenever the WE and CE signals are active
(low) after address inputs are stable. The later-occurring falling edge of CE or WE will determine the
start of the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address
inputs must be kept valid throughout the write cycle. WE must return to the high state for a minimum
recovery time (t
(high) during write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and
DATA RETENTION MODE
The DS1225AB provides full functional capability for V
4.5 volts. The DS1225AD provides full-functional capability for V
protects by 4.25 volts. Data is maintained in the absence of V
The nonvolatile static RAMs constantly monitor V
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high-
impedance. As V
energy source to RAM to retain data. During power-up, when V
the power switching circuit connects external V
Normal RAM operation can resume after V
DS1225AD.
FRESHNESS SEAL
Each DS1225 is shipped from Maxim with the lithium energy source disconnected, guaranteeing full
energy capacity. When V
enabled for battery backup operation.
CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 13
OE active) then WE will disable the outputs in t
CO
for CE or t
WR
CC
0
) before another cycle can be initiated. The OE control signal should be kept inactive
-A
falls below approximately 3.0 volts, the power switching circuit connects the lithium
OE
12
) defines which of the 8192 bytes of data is to be accessed. Valid data will be
for OE rather than address access.
CC
is first applied at a level of greater than V
CC
exceeds 4.75 volts for the DS1225AB and 4.5 volts for the
CC
ODW
ACC
2 of 9
CC
to RAM and disconnects the lithium energy source.
. Should the supply voltage decay, the NV SRAMs
(Access Time) after the last address input signal is
from its falling edge.
CC
greater than 4.75 volts and write protects by
CC
without any additional support circuitry.
CC
rises above approximately 3.0 volts,
CC
TP
greater than 4.5 volts and write
, the lithium energy source is
DS1225AB/AD