DS24B33 Maxim, DS24B33 Datasheet - Page 8

• Manufacturer Part Number: DS24B33
• Description: The DS24B33 is a 4096-bit, 1-Wire® EEPROM organized as 16 memory pages of 256 bits each
• Manufacturer: Maxim

1-Wire 4Kb EEPROM
The DS24B33 employs three address registers: TA1,
TA2, and E/S (Figure 6). Registers TA1 and TA2 must
be loaded with the target address to which the data is
written or from which data is read. Register E/S is a
read-only transfer status register used to verify data
integrity with write commands. ES bits E[4:0] are
loaded with the incoming T[4:0] on a Write Scratchpad
command and increment on each subsequent data
byte. This is, in effect, a byte-ending offset counter
within the 32-byte scratchpad. Bit 5 of the E/S register,
called the partial byte flag (PF), is set if the number of
data bits sent by the master is not an integer multiple of
8 or if the data in the scratchpad is not valid due to a
loss of power. A valid write to the scratchpad clears the
PF bit. Bit 6 has no function; it always reads 0. The
highest valued bit of the E/S register, called authoriza-
tion accepted (AA), is valid only if the PF flag reads 0. If
PF is 0 and AA is 1, the data stored in the scratchpad
has already been copied to the target memory address.
Writing data to the scratchpad clears this flag.
To write data to the DS24B33, the scratchpad must be
used as intermediate storage. First, the master issues
the Write Scratchpad command to specify the desired
target address, followed by the data to be written to the
scratchpad. Under certain conditions (see the Write
Figure 6. Address Registers
8
_______________________________________________________________________________________
Address Registers and Transfer Status
TARGET ADDRESS (TA1)
TARGET ADDRESS (TA2)
ENDING ADDRESS WITH
DATA STATUS (E/S)
BIT NUMBER
(READ ONLY)
Writing with Verification
Memory Access
T15
AA
T7
7
T14
T6
6
0
T13
PF
T5
5
Scratchpad [0Fh] section) the master receives an
inverted CRC-16 of the command, address, and data at
the end of the Write Scratchpad command sequence.
Knowing this CRC value, the master can compare it to
the value it has calculated itself to decide if the commu-
nication was successful and proceed to the Copy
Scratchpad command. If the master could not receive
the CRC-16, it should send the Read Scratchpad com-
mand to verify data integrity. As a preamble to the
scratchpad data, the DS24B33 repeats the target
address TA1 and TA2 and sends the contents of the
E/S register. If the PF flag is set, data did not arrive cor-
rectly in the scratchpad or there was a loss of power
since data was last written to the scratchpad. The mas-
ter does not need to continue reading; it can start a
new trial to write data to the scratchpad. Similarly, a set
AA flag together with a cleared PF flag indicates that
the device did not recognize the write command. If
everything went correctly, both flags are cleared and
the ending offset indicates the address of the last byte
written to the scratchpad. Now the master can continue
reading and verifying every data byte. After the master
has verified the data, it can send the Copy Scratchpad
command, for example. This command must be fol-
lowed exactly by the data of the three address registers
TA1, TA2, and E/S. The master should obtain the con-
tents of these registers by reading the scratchpad. As
soon as the DS24B33 has received these bytes correctly,
it starts copying the scratchpad data to the requested
location.
T12
E4
T4
4
T11
E3
T3
3
T10
E2
T2
2
T1
T9
E1
1
E0
T0
T8
0