DS12887 Maxim, DS12887 Datasheet
DS12887
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DS12887 Summary of contents
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... RAM (113 bytes in the DS12C887 and DS12C887A). The DS12887 integrates a quartz crystal and lithium energy source into a 24-pin encapsulated DIP package. The DS12C887 adds a century byte at address 32h ...
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... PDIP, SO, PLCC, TQFP ..................................-55°C to +125°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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DC ELECTRICAL CHARACTERISTICS ( 3.0V over the operating range, unless otherwise noted.) (Note 2) CC BAT A PARAMETER SYMBOL V Current (OSC On); BAT T = +25° 3.0V A BACKUP V Current ...
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Real-Time Clocks AS t ASD AD0–AD7 WRITE AD0–AD7 READ AS t ASD DS t ASD R ASL AD0–AD7 WRITE 4 _____________________________________________________________________ Motorola Bus Read/Write Timing PW ASH t ASED t CYC ...
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AS t ASD DS t ASD R/W CS AD0–AD7 IRQ Release Delay Timing DS RESET IRQ t IRDS PF(MAX) V PF(MIN) RECOGNIZED INPUTS VALID OUTPUTS t CYC PW ASH t ASED ...
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... DR CONDITIONS 3.0V 50pF + 1TTL Gate Input/Output: V 5ns ; MOT, AS, AD0–AD7 = MIN TYP MAX 20 200 300 0 MIN TYP MAX 10 MIN TYP MAX 5 7 TEST CONDITIONS maximum and V minimum IL IH open. BACKUP UNITS ms µs µs UNITS years UNITS pF pF ...
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T = +25°C, unless otherwise noted vs. V BAT1 BAT vs. TEMPERATURE +85°C CC 300 250 0°C +70°C +40°C 200 -40°C 150 2.5 2.8 3.0 3.5 3.3 V (V) BAT X1 ...
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Real-Time Clocks PIN SO, EDIP PLCC TQFP PDIP — — 5–10, 4–11 4– 15, 20 12, 17 ...
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... No Connection. This pin should remain unconnected. Pin 21 is RCLR for the N.C. DS12887A/DS12C887A. On the EDIP, these pins are missing by design. D ata Read Inp ut. The has ati end the l evel of the hen the connected sel ected ...
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... Real-Time Clocks PIN SO, EDIP PLCC TQFP PDIP — (DS12887A DS12C887A ____________________________________________________________________ Pin Description (continued) NAME Active-Low Interrupt Request Output. The IRQ pin is an active-low output of the device that can be used as an interrupt input to a processor. The IRQ output remains low as long as the status bit causing the interrupt is present and the corresponding interrupt-enable bit is set ...
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Detailed Description The DS12885 family of RTCs provide 14 bytes of real- time clock/calendar, alarm, and control/status registers and 114 bytes (113 bytes for DS12C887 and DS12C887A) of nonvolatile, battery-backed static RAM. A time-of-day alarm, three maskable interrupts with a ...
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... Refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks for more detailed information. Clock Accuracy for DS12887, DS12887A, DS12C887, DS12C887A Only The encapsulated DIP modules are trimmed at the fac- tory to an accuracy of ±1 minute per month at +25°C. ...
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... Read/Write Bit. * DS12C887, DS12C887A only. General-purpose RAM on DS12885, DS12887, and DS12887A. Note: Unless otherwise specified, the state of the registers is not defined when power is first applied. Except for the seconds regis- ter, 0 bits in the time and date registers can be written to 1, but may be modified when the clock updates. 0 bits should always be written to 0 except for alarm mask bits ...
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... Read/Write Bit. * DS12C887, DS12C887A only. General-purpose RAM on DS12885, DS12887, and DS12887A. Note: Unless otherwise specified, the state of the registers is not defined when power is first applied. Except for the seconds regis- ter, 0 bits in the time and date registers can be written to 1, but may be modified when the clock updates. 0 bits should always be written to 0 except for alarm mask bits ...
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Control Registers The real-time clocks have four control registers that are accessible at all times, even during the update cycle. MSB BIT 7 BIT 6 BIT 5 UIP DV2 Bit 7: Update-In-Progress (UIP). This bit is a status flag that ...
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Real-Time Clocks MSB BIT 7 BIT 6 BIT 5 SET PIE Bit 7: SET. When the SET bit is 0, the update transfer functions normally by advancing the counts once per second. When the SET bit is written to 1, ...
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MSB BIT 7 BIT 6 BIT 5 IRQF PF Bit 7: Interrupt Request Flag (IRQF). This bit is set to 1 when any of the following are true PIE = AIE = ...
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... The act of reading Register C clears all active flag bits and the IRQF bit. Interrupts When the DS12887, DS12887A, DS12C887, and DS12C887A are shipped from the factory, the internal oscillator is turned off. This prevents the lithium energy cell from being used until the device is installed in a system ...
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Table 3. Periodic Interrupt Rate and Square-Wave Output Frequency SELECT BITS t PERIODIC PI REGISTER A INTERRUPT RATE RS3 RS2 RS1 RS0 None 3.90625ms 7.8125ms ...
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... DS12885 AD2 6 DS12885S AD3 7 AD4 8 AD5 9 AD6 10 AD7 11 GND 12 SO, PDIP NOTE: THE DS12887A AND DS12C887A CANNOT BE STORED OR SHIPPED IN CONDUCTIVE MATERIAL THAT WILL GIVE A CONTINUITY PATH BETWEEN THE RAM CLEAR PIN AND GROUND. 20 ____________________________________________________________________ SQW 22 N.C. 21 RCLR 20 V BAT 19 ...
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... SUBSTRATE CONNECTED TO GROUND ____________________________________________________________________ Real-Time Clocks Ordering Information TOP MARK* DS12885 DS12885 DS12885Q DS12885Q DS12885Q DS12885Q DS12885S DS12885S DS12885S DS12885 DS12885 DS12887 DS12887A DS12C887 DS12C887AA Thermal Information THETA-JA (°C/W) THETA-JC (°C/ 105 Package Information PACKAGE CODE DOCUMENT NO. W24+1 21-0042 ...
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... Ordering Information table. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...