DS1337C Maxim, DS1337C Datasheet
DS1337C
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DS1337C Summary of contents
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... FEATURES Real-Time Clock (RTC) Counts Seconds, Minutes, Hours, Day, Date, Month, and Year with Leap-Year Compensation Valid Up to 2100 Available in a Surface-Mount Package with an Integrated Crystal (DS1337C) 2 Serial Interface Two Time-of-Day Alarms Oscillator Stop Flag ...
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... Soldering Temperature…………………………………………………………See IPC/JEDEC J-STD-020 Specification Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...
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... Note 10: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V Note 11: bridge the undefined region of the falling edge of SCL. The maximum t need only be met if the device does not stretch the LOW period (t Note 12: HD:DAT ...
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The parameter t is the period of time that the oscillator must be stopped for the OSF bit to be set over the Note 16: OSF voltage range of V CC(MIN) TYPICAL OPERATING CHARACTERISTICS (V = 3.3V +25°C, ...
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PIN DESCRIPTION PIN NAME — — X2 INTA GND 5 16 SDA 6 1 SCL 7 2 SQW/INTB — 4–13 N.C. TIMING DIAGRAM FUNCTION Connections for a ...
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BLOCK DIAGRAM "C" version only SERIAL BUS SCL INTERFACE AND ADDRESS REGISTER SDA DETAILED DESCRIPTION The Block Diagram shows the main elements of the DS1337. As shown, communications to and from the DS1337 2 ...
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... UNLESS THERE IS A GROUND PLANE BETWEEN THE SIGNAL LINE AND THE PACKAGE. DS1337C ONLY The DS1337C integrates a standard 32,768Hz crystal in the package. Typical accuracy at nominal V is approximately +10ppm. Refer to Application Note 58 for information about crystal accuracy vs. temperature. OPERATING MODES The amount of current consumed by the DS1337 is determined, in part, by the I operation ...
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ADDRESS MAP Table 2 shows the address map for the DS1337 registers. During a multibyte access, when the address pointer reaches the end of the register space (0Fh) it wraps around to location 00h pointer incrementing to ...
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CLOCK AND CALENDAR The time and calendar information is obtained by reading the appropriate register bytes. The RTC registers are illustrated in Table 2. The time and calendar are set or initialized by writing the appropriate register bytes. The contents ...
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Table 3. Alarm Mask Bits ALARM 1 REGISTER MASK BITS DY/DT (BIT 7) A1M4 A1M3 ALARM 2 REGISTER MASK BITS DY/DT (BIT ...
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Bit 1: Alarm 2 Interrupt Enable (A2IE). When set to logic 1, this bit permits the alarm 2 flag (A2F) bit in the status register to assert INTA (when INTCN = assert SQW/INTB (when INTCN = 1). ...
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... I C bus. Within the bus specifications a standard mode (100kHz maximum clock rate) and a fast mode (400kHz maximum clock rate) are defined. The DS1337 works in both modes. Connections to the bus are made through the open-drain I/O lines SDA and SCL. The following bus protocol has been defined ...
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Figure 2. Data Transfer on I Depending upon the state of the R/W bit, two types of data transfer are possible: 1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is ...
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Figure 3. Data Write—Slave Receiver Mode <Slave Address> <Word Address (n)> S 1101000 0 A XXXXXXXX S - Start Master to slave A - Acknowledge (ACK Stop Slave to master Figure 4. Data Read (from Current Pointer Location)—Slave ...
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... HANDLING, PC BOARD LAYOUT, AND ASSEMBLY The DS1337C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal. Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line ...
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