DS87C530 Maxim, DS87C530 Datasheet
DS87C530
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DS87C530 Summary of contents
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... EPROM/ROM Microcontrollers with PIN CONFIGURATIONS TOP VIEW 7 8 DALLAS DS87C530 DS83C530 20 21 PLCC, WINDOWED CLCC 39 40 DALLAS DS87C530 DS83C530 52 1 The High-Speed Microcontroller User’s Guide must be used in conjunction with this data sheet. Download it at: www.maxim-ic.com/microcontrollers Real-Time Clock ...
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... DS83C530-ECL+ 0C to +70C DS83C530-ENL -40C to +85C DS83C530-ENL+ -40C to +85C + Denotes a lead(Pb)-free/RoHS-compliant device. * The windowed ceramic LCC package is intrinsically lead(Pb) free. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock MAX CLOCK SPEED PIN-PACKAGE (MHz PLCC 33 52 PLCC ...
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... The DS83C530 is a factory mask ROM version of the DS87C530 designed for high-volume, cost- sensitive applications identical in all respects to the DS87C530, except that the 16kB of EPROM is replaced by a user-supplied application program. All references to features of the DS87C530 will apply to the DS83C530, with the exception of EPROM-specific features where noted ...
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... RST 23 16 XTAL2 24 17 XTAL1 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DS87C530/ DS83C530 +5V Processor Power Supply Processor Digital Circuit Ground +5V RTC Supply isolated from V CC2 RTC Circuit Ground Reset Input. This pin contains a Schmitt voltage input to recognize external active high reset inputs ...
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... P1 P1.7 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION Program Store-Enable Output. This active-low signal is a chip enable for optional external ROM memory. PSEN provides an active-low pulse and is driven high when external ROM is not being accessed. Address Latch-Enable Output. This pin latches the external address LSB from the multiplexed address/data bus on Port 0 ...
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... N. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION Port 2 (A8–A15), I/O. Port bidirectional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pullup holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pullup ...
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... In the DS87C530/DS83C530, the same machine cycle takes 4 clocks. Thus the fastest instruction, one machine cycle, executes three times faster for the same crystal frequency. Note that these are identical instructions. ...
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... Therefore, they required the same amount of time. In the DS87C530/DS83C530, the MOVX instruction takes as little as two machine cycles or eight oscillator cycles but the “MOV direct, direct” uses three machine cycles or 12 oscillator cycles. While both are faster than their original counterparts, they now have different execution times ...
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... SM1_1 SM0/FE_1 SBUF1 ROMSIZE — — PMR CD1 CD0 STATUS PIP HIP TA T2CON TF2 EXF2 T2MOD — — RCAP2L RCAP2H DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock BIT 5 BIT 4 BIT 3 P0.5 P0.4 P0 — — GF1 TF0 TR0 IE1 M1 M0 GATE T2M T1M T0M P1 ...
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... RTCD1 NONVOLATILE FUNCTIONS The DS87C530/DS83C530 provide two functions that are permanently powered if a user supplies an external energy source. These are an on-chip RTC and a nonvolatile SRAM. The chip contains all related functions and controls. The user must supply a backup source and a 32.768kHz timekeeping crystal. ...
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... The following describes guidelines for choosing these devices. Timekeeping Crystal The DS87C530/DS83C530 can use a standard 32.768kHz crystal as the RTC time base. There are two versions of standard crystals available, with 6pF and 12.5pF load capacitance. The tradeoff is that the 6pF ...
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... Figure 3. Internal Backup Circuit IMPORTANT APPLICATION NOTE The pins on the DS87C530/DS83C530 are generally as resilient as other CMOS circuits. They have no unusual susceptibility to electrostatic discharge (ESD) or other electrical transients. However, no pin on the DS87C530/DS83C530 should ever be taken to a voltage below ground. Negative voltages on any pin can turn on internal parasitic diodes that draw current directly from the battery device pin is connected to the “ ...
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... PROGRAM MEMORY ACCESS On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the maximum address of on-chip ROM will cause the DS87C530/DS83C530 to access off-chip memory. However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature. Software can cause the microcontroller to behave like a device with less on-chip memory. This is beneficial when overlapping external memory, such as Flash, is used ...
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... When disabled, the 1kB memory area is transparent to the system memory map. Any MOVX directed to the space between 0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default condition. This default allows the DS87C530/DS83C530 to drop into an existing system that uses these addresses for other hardware and still have full compatibility. ...
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... SRAM. STRETCH MEMORY CYCLE The DS87C530/DS83C530 allow software to adjust the speed of off-chip data memory access. The microcontrollers can perform the MOVX in as few as two instruction cycles. The on-chip SRAM uses this speed and any MOVX instruction directed internally uses two cycles. However, the time can be stretched for interface to external devices ...
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... The timing of block moves of data memory is faster using the Dual Data Pointer (DPTR). The standard 8051 DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the DS87C530/DS83C530, the standard data pointer is called DPTR, located at SFR addresses 82h and 83h. These are the standard locations. Using DPTR requires no modification of standard code. The new DPTR at SFR 84h and 85h is called DPTR1 ...
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... Power Management Mode offers a complete scheme of reduced internal clock speeds that allow the CPU to run software but to use substantially less power. During default operation, the DS87C530/DS83C530 use four clocks per machine cycle. Thus the instruction cycle rate is (Clock/4). At 33MHz crystal speed, the instruction cycle speed is 8 ...
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... CRYSTAL-LESS PMM A major component of power consumption in PMM is the crystal amplifier circuit. The DS87C530/DS83C530 allow the user to switch CPU operation to an internal ring oscillator and turn off the crystal amplifier. The CPU would then have a clock source of approximately 2MHz to 4MHz, divided by either 4, 64, or 1024. The ring is not accurate, so software cannot perform precision timing. However, this mode allows an additional saving of between 0 ...
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... To return to a 4-clock rate from PMM, software can simply select the CD1 and CD0 clock control bits to the 4 clocks per cycle state. However, the DS87C530/DS83C530 provide several hardware alternatives for automatic Switchback. If Switchback is enabled, then the device will automatically return to a 4-clock per cycle speed when an interrupt occurs from an enabled, valid external interrupt source ...
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... Crystal/Ring Operation The DS87C530/DS83C530 allow software to choose the clock source as an independent selection from the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under software control. Power-on reset default is the crystal (or external clock) source. The ring may save power depending on the actual crystal speed ...
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... Status. Serial transmission on serial port 1. SPRA1 STATUS.2 Status. Serial word reception on serial port 1. SPTA0 STATUS.1 Status. Serial transmission on serial port 0. SPRA0 STATUS.0 Status. Serial word reception on serial port 0. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock FUNCTION RESET WRITE ACCESS only when X XTUP = 1 and XTOFF ...
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... Figure 5. Invoking and Clearing PMM DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ...
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... One exception is that a RTC interrupt can cause the device to exit Stop mode. This provides a very power efficient way of performing infrequent yet periodic tasks. The DS87C530/DS83C530 provide two enhancements to the Stop mode. As documented below, the device provides a bandgap reference to determine Power-fail Interrupt and Reset thresholds. The default state is that the bandgap reference is off while in Stop mode ...
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... EMI REDUCTION One of the major contributors to radiated noise in an 8051-based system is the toggling of ALE. The DS87C530/DS83C530 allow software to disable ALE when not used by setting the ALEOFF (PMR.2) bit to 1. When ALEOFF = 1, ALE will still toggle during an off-chip MOVX. However, ALE will remain in a static when performing on-chip memory access ...
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... The Clock Control register (CKCON; 8Eh) determines these timer speeds. When the relevant CKCON bit is logic 1, the DS87C530/DS83C530 use 4 clocks per cycle to generate timer speeds. When the bit the DS87C530 uses 12 clocks for timer speeds. The reset condition CKCON.5 selects the speed of Timer 2. CKCON.4 selects Timer 1 and CKCON.3 selects Timer 0. ...
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... If the PFI is enabled and the bandgap select bit (BGS) is set, a PFI will bring the device out of Stop mode. WATCHDOG TIMER To prevent software from losing control, the DS87C530/DS83C530 include a programmable watchdog timer. The Watchdog is a free-running timer that sets a flag if allowed to reach a preselected timeout. It can be (re)started by software. ...
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... Watchdog Interrupt using EWDI (EIE.4). INTERRUPTS The DS87C530/DS83C530 provide 14 interrupt sources with three priority levels. The Power-Fail Interrupt (PFI) has the highest priority. Software can assign high or low priority to other sources. All interrupts that are new to the 8051 family, except for the PFI, have a lower natural priority than the originals ...
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... RTCC.0 EPROM PROGRAMMING The DS87C530 follows standards for a 16kB EPROM version in the 8051 family available erasable, ceramic windowed package and in plastic packages for one-time user-programmable versions. The part has unique signature information so programmers can support its specific EPROM options. ...
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... DS87C530 SECURITY OPTIONS The DS87C530 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64- byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted form. Lock Bits The security lock consists of 3 lock bits. These bits select a total of 4 levels of security. Higher levels provide increasing security but also limit application flexibility ...
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... FCh * PL indicates pulse to a logic low. Table 10. EPROM Lock Bits LOCK BITS LEVEL LB1 LB2 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PSEN EA/VPP ALE/PROG L PL 12.75V 12.75V L PL 12.75V L PL 12.75V ...
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... Figure 7. EPROM Programming Configuration ROM-SPECIFIC FEATURES (DS83C530) The DS83C530 supports a subset of the EPROM features found on the DS87C530. SECURITY OPTIONS Lock Bits The DS83C530 employs a lock that restricts viewing of the ROM contents. When set, the lock will prevent MOVC instructions in external memory from reading program bytes in internal memory. When locked, the pin is sampled and latched on reset ...
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... The Signature bytes identify the DS83C530 to EPROM programmers. This information is at programming addresses 30h, 31h, and 60h. Because Mask ROM devices are not programmed in device programmers, most designers will find little use for the feature, and it is included only for compatibility. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ADDRESS VALUE ...
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... OH Output High Voltage Ports -1.5mA OH Output High Voltage Port 0 in Bus Mode I = -8mA OH Input Low Current Ports 0.45V Transition Current from Ports DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock SYMBOL MIN V 4 4.25 PFW V 4.0 RST V 2 ...
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... Note 14: 0.45 < V < Not a high-impedance input. This port is a weak address holding latch in Bus Mode. Peak current occurs near IN CC the input transition point of the latch, approximately 2V. TYPICAL I vs. FREQUENCY CC DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock SYMBOL MIN I - -300 L R RST = RST = 5 ...
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... Specifications assume a 50% duty cycle for the oscillator. Port 2 and ALE timing will change in relation to duty cycle variation. Note 2: Address is driven strongly until ALE falls, and is then held in a weak latch until overdriven externally. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock 33MHz SYMBOL MIN ...
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... Data Hold After Write RD Low to Address Float High to ALE High Note time period related to the Stretch memory cycle selection. The following table shows the value of t MCS selection. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock VARIABLE CLOCK SYMBOL MIN 1.5t -5 CLCL t ...
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... Clock Rising Output Data Hold from t Clock Rising Input Data Hold after t Clock Rising Clock Rising Edge to t Input Data Valid DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock M0 MOVX CYCLES 0 2 machine cycles 1 3 machine cycles (default machine cycles 1 5 machine cycles ...
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... Hold after PROG PP Width PROG Address to Data Valid Enable Low to Data Valid Data Float after Enable High to Low PROG PROG Note 1: All voltages are referenced to ground. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock I Instruction PSEN P Q Output data RD signal R V Valid SYMBOL MIN ...
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... EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock t VALL2 ...
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... DATA MEMORY WRITE CYCLE DATA MEMORY WRITE WITH STRETCH = 1 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock t AVLL2 ...
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... DATA MEMORY WRITE WITH STRETCH = 2 EXTERNAL CLOCK DRIVE DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ...
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... SERIAL PORT MODE 0 TIMING DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ...
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... POWER-CYCLE TIMING EPROM PROGRAMMING AND VERIFICATION WAVEFORMS DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ...
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... PACKAGE INFORMATION For the latest package outline information and land patterns www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE 52 TQFP C52+2 52 CQUAD K52-1 52 PLCC Q52+1 DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DOCUMENT NO. 21-0295 21-0383 21-0049 ...
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... The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DESCRIPTION ...