DS89C440 Maxim, DS89C440 Datasheet - Page 25
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DS89C440
Manufacturer Part Number
DS89C440
Description
The DS89C430 and DS89C450 offer the highest performance available in 8051-compatible microcontrollers
Manufacturer
Maxim
Datasheet
1.DS89C430.pdf
(46 pages)
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ROM Loader
The full on-chip flash program memory space, security flash block, and external SRAM can be programmed in-
system from an external source through serial port 0 under the control of a built-in ROM loader. The ROM loader
also has an auto-baud feature that determines which baud-rate frequencies are being used for communication and
sets the baud-rate generator for that speed.
When the DS89C430 is powered up and has entered its user operating mode, the ROM loader mode can be
invoked at any time by forcing RST = 1, EA = 0, and PSEN = 0. It remains in effect until power-down or when the
condition (RST = 1 and PSEN = EA = 0) is removed. Entering the ROM loader mode forces the processor to start
fetching from the 2kB internal ROM for program memory initialization and other loader functions.
The read/write accessibility is determined by the state of the lock bits, which can be verified directly by the ROM
loader.
The flash memory can be programmed (by the built-in ROM loader) using commands that are received over the
serial interface from a host PC. Full details of the ROM loader commands are given in the Ultra-High-Speed Flash
Microcontroller User’s Guide. Host software to communicate with the ROM loader is available in Windows® format
as well as other platforms. Contact our technical support department at
information.
Parallel Programming Mode
The microcontroller also supports a programming mode such as that used by commercial device programmers.
This mode is of little utility in normal applications and is only used by commercial device programmers. For
information on this mode, contact our technical support department.
Data Pointer Increment/Decrement and Options
The DS89C430 incorporates a hardware feature to assist applications that require data pointer increment/
decrement. Data pointer increment/decrement bits ID0 and ID1 (DPS.6 and DPS.7) define how the INC DPTR
instruction functions in relation to the active DPTR (selected by the SEL bit). Setting ID0 = 1 and SEL = 0 enables
the decrement operation for DPTR, and execution of the INC DPTR instruction decrements the DPTR contents
by 1. Similarly, setting ID1 = 1 and SEL = 1 enables the decrement operation for DPTR1, and execution of the INC
DPTR instruction decrements the DPTR1 contents by 1. With this feature, the user can configure the data pointers
to operate in four ways for the INC DPTR instruction:
SEL (DPS.0) bit always selects the active data pointer. The DS89C430 offers a programmable option that allows
any instructions related to data pointer to toggle the SEL bit automatically. This option is enabled by setting the
toggle-select-enable bit (TSL–DPS.5) to a logic 1. Once enabled, the SEL bit is automatically toggled after the
execution of one of the following five DPTR-related instructions:
The DS89C430 also offers a programmable option that automatically increases (or decreases) the contents of the
selected data pointer by 1 after the execution of a DPTR-related instruction. The actual function (increment or
decrement) is dependent on the setting of the ID1 and ID0 bits. This option is enabled by setting the automatic
increment/decrement enable (AID–DPS.4) to a logic 1 and is affected by the following three instructions:
Windows is a registered trademark of Microsoft Corporation.
INC DPTR
MOV DPTR #data16
MOVC A, @A+DPTR
MOVX A, @DPTR
MOVX @DPTR, A
MOVC A, @A+DPTR
MOVX A, @DPTR
MOVX @DPTR, A
ID1
0
0
1
1
ID0
0
1
0
1
INC DPTR
DEC DPTR
INC DPTR
DEC DPTR
SEL = 0
DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers
25 of 46
INC DPTR1
INC DPTR1
DEC DPTR1
DEC DPTR1
SEL = 1
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