MAXQ612 Maxim, MAXQ612 Datasheet - Page 25
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MAXQ612
Manufacturer Part Number
MAXQ612
Description
The MAXQ612/MAXQ622 are low-power, 16-bit MAXQ® microcontrollers designed for low-power applications including universal remote controls, consumer electronics, and white goods
Manufacturer
Maxim
Datasheet
1.MAXQ612.pdf
(35 pages)
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Table 3. USART Mode Details
2) Transfers its current IRV value to the IRMT.
3) Resets IRV content to 0000h (if IRXRL = 1).
4) Continues counting again until the next qualified event.
If the IR timer value rolls over from 0FFFFh to 0000h
before a qualified event happens, the IR timer overflow
(IROV) flag is set to 1 and an interrupt is generated, if
enabled. The IR module continues to operate in receive
mode until it is stopped by switching into transmit mode
or clearing IREN = 0.
A special mode reduces the CPU processing burden
when performing IR learning functions. Typically, when
operating in an IR learning capacity, some number of
carrier cycles are examined for frequency determination.
Once the frequency has been determined, the IR receive
function can be reduced to counting the number of car-
rier pulses in the burst and the duration of the combined
mark-space time within the burst. To simplify this pro-
cess, the receive burst-count mode can be used. When
RXBCNT = 0, the standard IR receive capture function-
ality is in place. When RXBCNT = 1, the IRV capture
operation is disabled and the interrupt flag associated
with the capture no longer denotes a capture. In the
carrier burst-count mode, the IRMT register only counts
qualified edges. The IRIF interrupt flag now sets if two
IRCA cycles elapse without getting a qualified edge. The
IRIF interrupt flag thus denotes absence of the carrier
and the beginning of a space in the receive signal. The
IRCFME bit is still used to define whether the IRV register
is counting system IRCLK clocks or IRCA-defined carrier
cycles. The IRXRL bit defines whether the IRV register
is reloaded with 0000h on detection of a qualified edge
(per the IRXSEL[1:0] bits).
The microcontroller provides two general-purpose tim-
ers/counters that support the following functions:
• 16-bit timer/counter
• 16-bit up/down autoreload
• Counter function of external pulse
Mode 0
Mode 1
Mode 2
Mode 3
MODE
______________________________________________________________________________________
16-Bit Timers/Counters
Carrier Burst-Count Mode
Asynchronous
Asynchronous
Asynchronous
Synchronous
TYPE
Infrared Module and Optional USB
16-Bit Microcontrollers with
START BITS
N/A
• 16-bit timer with capture
• 16-bit timer with compare
• Input/output enhancements for pulse-width modulation
• Set/reset/toggle output state on comparator match
• Prescaler with 2n divider (for n = 0, 2, 4, 6, 8, 10)
The microcontroller provides port pins for general-pur-
pose I/O that have the following features:
• CMOS output drivers
• Schmitt trigger inputs
• Optional weak pullup to V
While the microcontroller is in a reset state, all port pins
become three-state with both weak pullups and input
buffers disabled, unless otherwise noted.
From a software perspective, each port appears as a
group of peripheral registers with unique addresses.
Special function pins can also be used as general-pur-
pose I/O pins when the special functions are disabled.
For a detailed description of the special functions avail-
able for each pin, refer to the IC-specific user’s guide,
e.g., the MAXQ622 User’s Guide describes all special
functions available on the MAXQ612/MAXQ622.
The microcontroller supports two independent USARTs,
two SPI master/slave communications ports, and an I
bus.
The USART units are implemented with the following
characteristics:
• 2-wire interface
• Full-duplex operation for asynchronous data transfers
• Half-duplex operation for synchronous data transfers
• Programmable interrupt for receive and transmit
• Independent baud-rate generator
1
1
1
mode
DATA BITS
8 + 1
8 + 1
8
8
General-Purpose I/O
Serial Peripherals
DD
when operating in input
STOP BITS
N/A
1
1
1
USART
2
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