MAXQ7670A Maxim, MAXQ7670A Datasheet
MAXQ7670A
Related parts for MAXQ7670A
MAXQ7670A Summary of contents
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... The flexible, modular architecture used in the MAXQ µCs allows development of targeted prod- ucts for specific applications with minimal effort. The MAXQ7670A is available in a 40-pin, 5mm x 5mm TQFN package, and is specified to operate over the -40°C to +125°C automotive temperature range. ...
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... GNDIO ............................................-0. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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PGA, 64KB Flash, and CAN Interface ELECTRICAL CHARACTERISTICS (continued +5.0V +3.3V, V DVDDIO AVDD DVDD noted. Typical values are +25°C.) (Note 1) A PARAMETER SYMBOL MEMORY SECTION Flash Memory Size Flash Page Size ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface ELECTRICAL CHARACTERISTICS (continued +5.0V +3.3V, V DVDDIO AVDD DVDD noted. Typical values are +25°C.) (Note 1) A PARAMETER SYMBOL Channel Select Plus t ...
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... Maximum AVDD Bypass Capacitor to AGND +2.5V (DVDD) LINEAR REGULATOR DVDD Output Voltage No-Load Quiescent Current Output Current Capability Output Short-Circuit Current Maximum DVDD Bypass Capacitor to DGND SUPPLY-VOLTAGE SUPERVISORS AND BROWNOUT DETECTION DVDD Reset Threshold DVDD Interrupt Threshold Minimum DVDD Interrupt and Reset Threshold Difference ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface ELECTRICAL CHARACTERISTICS (continued +5.0V +3.3V, V DVDDIO AVDD DVDD noted. Typical values are +25°C.) (Note 1) A PARAMETER SYMBOL HIGH-FREQUENCY CRYSTAL OSCILLATOR Clock ...
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... ELECTRICAL CHARACTERISTICS (continued +5.0V +3.3V, V DVDDIO AVDD DVDD noted. Typical values are +25°C.) (Note 1) A PARAMETER SYMBOL Output Capacitance Maximum Output Impedance SYSTEM CLOCK System Clock Frequency f SYSCLK SPI INTERFACE TIMING SPI Master Operating f MCLK Frequency SPI Slave Mode Operating f SCLK ...
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... REFADC to AGND as close as possible to REFADC. Note 10: The digital design is fully static. However, the lower clock limit is set by a clock detect circuit. The MAXQ7670A switches to the internal RC clock if the external input goes below 166kHz. This clock detect circuit also acts to detect a crystal failure when a crystal is used ...
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PGA, 64KB Flash, and CAN Interface SAMPLE EDGE SHIFT EDGE t MCL SCLK (CKPOL/CKPHA = 0/1 OR 1/0 MODE) t MCH SCLK (CKPOL/CKPHA = 0/0 OR 1/1 MODE MIH MIS MISO MOSI Figure 1. SPI Timing Diagram in ...
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... PGA GAIN = 16V 1.6 IN-DIFF V = +1.65V IN-CM 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 -25 - 110 125 TEMPERATURE (°C) DVDD, RESET POWER-DOWN CHARACTERISTICS MAXQ7670A toc08 REGEN2 = GNDIO 20ms/div = 3.3V +25°C, unless REFDAC A ADC INL vs. CODE (REF ADC = +3.3V, 75ksps, PGA GAIN = 16V/V) 1.0 BIPOLAR MODE 0 -100mV TO +100mV IN 0.6 0.4 0.2 0 -0.2 -0 ...
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... TEMPERATURE (°C) ______________________________________________________________________________________ Microcontroller with 12-Bit ADC, Typical Operating Characteristics (continued) = 2.5V 16MHz, ADC resolution = 12 bits, V SYSCLK MAXIMUM AVDD TRANSIENT DURATION vs. BOI THRESHOLD OVERDRIVE 200 BOI ASSERTED ABOVE THIS LINE 180 160 140 120 100 ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface (V = 5.0V 3.3V, V DVDDIO AVDD DVDD otherwise noted.) RC OSCILLATOR OUTPUT FREQUENCY vs. DVDD 16.0 15.5 15.0 14.5 14.0 2.25 2.35 2.45 2.55 2.65 2.75 DVDD ...
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PGA, 64KB Flash, and CAN Interface (V = 5.0V 3.3V, V DVDDIO AVDD DVDD otherwise noted.) AVDD SUPPLY CURRENT vs. ADC SAMPLING RATE 5.7 PGA GAIN = 16V/V 5.6 5.5 5 100 1000 ADC SAMPLING RATE ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface PIN NAME Analog Input Channel 7. AIN7 is multiplexed to the PGA or ADC as single-ended analog input AIN7 differential input with AIN6 ...
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... Port 0 Bit 5. P0 general-purpose digital I/O with interrupt/wake-up capability. Reset Input/Output. Active-low input/output with internal 55kΩ pullup to DVDDIO. Drive low to reset the RESET 33 MAXQ7670A. The MAXQ20 µC core holds RESET low during POR and during DVDD brownout conditions. 34 DGND Digital Ground High-Frequency Crystal Output ...
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... PGA, 64KB Flash, and CAN Interface DVDDIO DVDDIO AIN0 AIN1 AIN2 AIN3 10:1 AIN4 MUX AIN5 AIN6 AIN7 AIN1 AIN3 AIN5 6:1 AIN7 MUX AIN9 AGND MAXQ7670A DVDDIO +2.5V LINEAR DVDDIO REGEN2 REGAULATOR GNDIO RESET DVDD DVDD POWER-ON DGND RESET MONITOR VDPE DVDDIO TCK JTAG INTERFACE I/O TDI ...
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... PGA, 64KB Flash, and CAN Interface Detailed Description The MAXQ7670A incorporates a 16-bit RISC arithmetic logic unit (ALU) with a Harvard memory architecture that addresses 64KB (32K x 16) of flash and 2048 bytes (1024 x 16) of RAM memory. This core combined with digital and analog peripherals provide versatile data-acquisition functions ...
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... Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface P0.4/ADCCNV AIN0 AIN2 AIN4 AIN6 AIN1 AIN3 AIN5 AIN7 REFADC Figure 4. Simplified Analog Input Diagram (Four Fully Differential Inputs) 18 ______________________________________________________________________________________ TIMER 0 MAXQ7670A CONVERSION CONTROL PGG 4:1 MUX PGA 12-BIT ADC 1V/V OR 125ksps 16V/V 4:1 MUX ADCE ADCMX 3 ...
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... AIN4/AIN5, and AIN6/AIN7. Table 1 shows the single- ended and differential input configurations possible for the ADC mux. Analog Input Track and Hold A SAR conversion in the MAXQ7670A has different T/H cycles depending on whether a gain of 1 (bypass gain of 16 (PGA enabled) is selected. Table 1. ADC Mux Input Configurations ...
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... LRAPD bit in the APE register to 0. The AVDD supply begins ramping to its nominal voltage of +3.3V. The MAXQ7670A features brownout monitors for the +5V DVDDIO, +3.3V AVDD, and +2.5V DVDD power sup- plies. When enabled, these monitors generate interrupts when DVDDIO, AVDD, or DVDD fall below their respec- tive brownout thresholds. Monitoring the supply rails alerts the µ ...
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... When using the regulators to power AVDD and DVDD and to provide power to external devices, make sure DVDDIO’s power input can source a current greater than the sum of the MAXQ7670A sup- ply current and the load currents of the two regulators. BROWNOUT ...
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... The watch- dog reset timeout occurs 512 RC oscillator cycles after the watchdog interrupt timeout. For more information on the MAXQ7670A watchdog timer, refer to the MAXQ7670 User’s Guide. CLK_RC DIV 2 ...
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... PGA, 64KB Flash, and CAN Interface The MAXQ7670A includes a 16-bit timer channel. The timer offers two ports, T0 and T0B, to facilitate PWM outputs, and capture timing events. The autoreload 16- bit timer/counter offers the following functions: • 8-/16-bit timer/counter • Up/down autoreload • Counter function of external pulse • ...
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... The MAXQ7670A includes a powerful hardware SPI module, providing serial communication with a wide variety of external devices. The SPI port on the MAXQ7670A is a fully independent module that is accessed through software. This full 4-wire, full-duplex serial bus module supports master and slave modes. BIT ...
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... SPI port. Figures 1 and 2 illustrate the timing parameters listed in the Electrical Characteristics table. General-Purpose Digital I/Os The MAXQ7670A provides seven general-purpose digi- tal I/Os (GPIOs). Some of the GPIOs include an addi- tional special function (SF), such as a timer input/output. For example, the state of P0.6/T0 is pro- grammable to depend on timer channel 0 logic ...
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... MAXQ20 Core Architecture The MAXQ7670A’s core is a member of the low-cost, high-performance, CMOS, fully static, 16-bit MAXQ20 core µCs. The MAXQ7670A is structured on a highly advanced, accumulator-based, 16-bit RISC architec- ture. Fetch and execution operations complete in one cycle without pipelining because the instruction con- tains both the op code and data ...
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... UTILITY ROM 32K x 16 PROGRAM FLASH EXECUTING FROM Figure 12. MAXQ7670A Memory Map ______________________________________________________________________________________ Microcontroller with 12-Bit ADC, Enabling a pseudo-Von Neumann memory map places the utility ROM, code, and data memory into a single contiguous memory map. Use this mapping scheme for applications that require dynamic program modification or unique memory configurations ...
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... For more information on the utility ROM contents, refer to the MAXQ7670 User’s Guide . Programming Flash Memory The MAXQ7670A allows the user to program its flash through the JTAG or the CAN port by allowing access to the ROM-based bootloader through these ports. The ...
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PGA, 64KB Flash, and CAN Interface Power Management Advanced power-management features minimize power consumption by dynamically matching the pro- cessing speed of the device to the required perfor- mance level. During periods of reduced activity, lower the system clock speed ...
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... This is a parameter often stated by quartz crystal vendors and is called R1. When a resonator is used in the parallel resonant mode with an external load capacitance the case with the MAXQ7670A oscillator circuit, the effective resistance is sometimes stated. This effective resistance at the loaded frequen- ...
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PGA, 64KB Flash, and CAN Interface Table 3. System Register Bit and Reset Values REGISTER APC PSF IC IMR SC IIR CKCN WDCN A[n] (0..15 PFX[n] (0..15 ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface Table 4. Peripheral Register Map REGISTER M0 (0h) INDEX 0h PO0 1h — 2h — 3h EIFO 4h — 5h — 6h — 7h — 8h PI0 9h — Ah ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface ______________________________________________________________________________________ 33 ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface 34 ______________________________________________________________________________________ ...
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Microcontroller with 12-Bit ADC, PGA, 64KB Flash, and CAN Interface ______________________________________________________________________________________ 35 ...
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... RESET EXTERNAL RESET IS OPTIONAL 36 ______________________________________________________________________________________ AIN0 AIN2 -2nF MUX AIN4 -2nF AIN6 12-BIT AIN1 ADC AIN3 PGA MUX AIN5 x16 AIN7 -2nF -2nF MAXQ7670A P0.7/T0B P0.6/T0 P0.5 P0.4/ADCCNV -2nF P0.2 P0.1 GPIO -2nF P0.0 16-BIT TIMER SPI SCLK MISO JTAG MOSI CAN 2.0B -2nF SS MAXQ20 CORE -2nF ...
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... Pin Configuration TOP VIEW AIN7 + AIN6 2 AIN5 3 AIN4 4 5 REFADC MAXQ7670A 6 AGND AIN3 7 8 AIN2 9 AIN1 10 AIN0 ______________________________________________________________________________________ Microcontroller with 12-Bit ADC, PROCESS: CMOS 31 30 TCK *EP For the latest package outline information and land patterns, go ...
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... Initial release Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 38 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © ...