71M6513H Maxim, 71M6513H Datasheet - Page 14
71M6513H
Manufacturer Part Number
71M6513H
Description
The 71M6513 and 71M6513H are highly integrated SoCs with an MPU core, RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6513.pdf
(104 pages)
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The end of each multiplexer cycle is signaled to the MPU by the CE_BUSY interrupt. At the end of each multiplexer cycle,
status information, such as sag data and the digitized input signal, is available to the MPU.
Figure 5 shows the accumulation interval resulting from PRE_SAMPS = 42 and SUM_CYCLES = 50, consisting of 2100 samples
of 397µs each (only one phase is shown) followed by the XFER_BUSY interrupt. The sampling in this example is applied to a
50Hz signal.
There is no correlation between the line signal frequency and the choice of PRE_SAMPS or SUM_CYCLES (even though when
SUM_CYCLES = 42 one set of SUM_CYCLES happens to sample a period of 16.6ms). Furthermore, sampling does not have to
start when the line voltage crosses the zero line.
Delay Compensation
When measuring the energy of a phase (i.e., Wh and VARh) in a service, the voltage and current for that phase must be
sampled at the same instant. Otherwise, the phase difference, Ф, introduces errors.
Page: 14 of 104
A Maxim Integrated Products Brand
20ms
20ms
B
B
IA
IA
1/2520.6Hz = 397µs
1/2520.6Hz = 397µs
VA
VA
VB
VB
IB
IB
Figure 4: Samples in Multiplexer Cycle
© 2005-2011 Teridian Semiconductor Corporation
IC
IC
Figure 5: Accumulation Interval
VC
VC
833ms
833ms
3-Phase Energy Meter IC
13/32768Hz = 397µs
13/32768Hz = 397µs
per mux cycle
per mux cycle
2/32768Hz =
2/32768Hz =
61.04µs
61.04µs
71M6513/71M6513H
A
A
C
C
DATA SHEET
Interrupt to MPU
Interrupt to MPU
XFER_BUSY
XFER_BUSY
AUGUST 2011
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