73S8010R Maxim, 73S8010R Datasheet - Page 13
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73S8010R
Manufacturer Part Number
73S8010R
Description
The 73S8010R is a single smart card interface IC, compliant to the electrical requirements of ISO 7816-3 and EMV 4
Manufacturer
Maxim
Datasheet
1.73S8010R.pdf
(25 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
73S8010R-IM/F
Manufacturer:
Maxim
Quantity:
222
DS_8010R_022
3 Applications Information
This section provides general usage information for the design and implementation of the 73S8010R.
3.1
Figure 4 shows a typical application schematic for the implementation of the 73S8010R. Note that minor changes may occur to the reference
material from time to time and the reader is encouraged to contact Teridian for the latest information
Rev. 1.6
NOTES:
1) VDD = 2.7V to 5.5V DC.
2) VPC = 4.75V(EMV, ISO) to 5.5V DC
3) Required if external clock from uP is used.
4) Required if crystal is used.
5) Optional. Can be left open.
6) R1 and R3 are external resistors that adjust the VDD
7) Hardware to define address of device
fault voltage. Can be left open.
Y1, C2 and C3 must be removed if external clock is used.
Example 73S8010R Schematics
VPC
See note 2
See note 7
SAD0
SAD1
SAD2
100nF
C4
VDD
C5
10uF
R2
20K
Figure 4: Typical 73S8010R Application Schematic
Card detection
switch is
normally closed
10
11
12
13
14
1
2
3
4
5
6
7
8
9
73S8010R
SAD0
SAD1
SAD2
GND
GND
VPC
NC
NC
NC
PRES
I/O
AUX2
AUX1
GND
Smart Card Connector
VDDF_ADJ
XTALOUT
AUX2UC
AUX1UC
XTALIN
I/OUC
SO28
GND
VDD
VCC
RST
SDA
SCL
CLK
INT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLK track should be routed
far from RST, I/O, C4 and
C8.
C1
ISO7816=1uF, EMV=3.3uF
Low ESR (<100mohms) C1
should be placed near the SC
connecter contact
See note 6
VDD
Rext1
R3
Rext2
R1
AUX2UC_to/from_uC
AUX1UC_to.from_uC
I/OUC_to/from_uC
R4
2K
See NOTE 1
R5
2K
- OR -
VDD
100nF
C6
External_clock_from uC
See NOTE 5
See NOTE 4
Y1
CRYSTAL
INT_interrupt_to_uC
SDA_to/from_uC
SCK_from_uC
See NOTE 3
C2
C3
73S8010R Data Sheet
22pF
22pF
13