DS8007 Maxim, DS8007 Datasheet - Page 37

• Manufacturer Part Number: DS8007
• Description: The DS8007 multiprotocol dual smart card interface is a low-cost, dual smart card reader interface supporting all ISO 7816, EMV®, and GSM11-11 requirements
• Manufacturer: Maxim

The ISO UART implements a special control input that
allows an automatic switch from transmit mode
(UCR1.T/R = 1) to receive mode (UCR1.T/R = 0) upon
successful character transmission. The last character
to transmit (UCR1.LCT) bit must be set to 1 by host
software prior to writing the last character for transmis-
sion to UTR. Upon successful transmission of the char-
acter, the UCR1.T/R bit and the LCT bit are cleared by
hardware. When the LCT bit is used, the TBE/RBF bit is
not set at the end of the transmission.
The ISO UART receive mode is in effect if the associat-
ed UCR1.T/R bit is 0. When the ISO UART is changed
to receive mode, the MSR.FE bit is set to 1 to indicate
that the receive FIFO is empty. When at least one
unread receive character exists in the FIFO, the FE bit
is cleared. When the FIFO, with depth defined by
FL2–FL0, is full, the TBE/RBF bit is set to 1 to indicate
that the receive buffer is full. Once a character is read
from a full FIFO, the RBF/TBE bit is cleared to indicate
that the FIFO is no longer full. The controller ready
Figure 15. Last Character to Transmit
TBE/RBF BIT
LCT BIT
T/R BIT
I/O
______________________________________________________________________________________
Multiprotocol Dual Smart Card Interface
Last Character to Transmit
LAST CHARACTER
Receive Mode
P
LAST CHARACTER TO TRANSMIT
SOFTWARE, THEN LOAD UTR.
LCT BIT WRITTEN TO 1 BY
(CRED) bit should be polled to assess data readiness
when reading from register URR at high frequencies.
The T = 1 protocol selection checks receive parity. For
T = 1, the parity error count bits (PEC2–PEC0) have no
function and the USR.PE bit are set on the first parity
error.
The T = 0 protocol selection also checks receive parity,
but allows setting of the USR.PE parity error bit to be
based upon detection of 1–8 parity errors. The
PEC2–PEC0 bits define the number of consecutive par-
ity errors that should be detected before setting
USR.PE.
The ISO UART implements a special control input that
allows testing for inverse parity. If the UCR1.FIP bit is
configured to 0 during receive mode, the ISO UART
tests for correct parity on each received character. If
UCR1.FIP is configured to 1, inverse parity is expected.
This control can be useful in testing that the ICC prop-
erly detects error signals generated by the DS8007 and
retransmits requested characters.
LAST CHARACTER
T/R BITS ARE BOTH CLEARED
TBE REMAINS 0, LCT AND
TO 0 BY HARDWARE.
P
Parity Check
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