DS4520 Maxim, DS4520 Datasheet - Page 7
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DS4520
Manufacturer Part Number
DS4520
Description
The DS4520 is a 9-bit nonvolatile (NV) I/O expander with 64 bytes of NV
user memory controlled by an I²C-compatible serial interface
Manufacturer
Maxim
Datasheet
1.DS4520.pdf
(10 pages)
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Table 1. DS4520 Memory Map
Figure 1. DS4520 Slave Address Byte
ADDRESS
FAh to FFh
00h to 3Fh
F5h to F7h
E8 to EFh
40 to E7h
F0h
F1h
F2h
F3h
F4h
F8h
F9h
*THE SLAVE ADDRESS IS DETERMINED BY
MSB
ADDRESS PINS A0, A1, AND A2.
1
Shadowed
disabled if
[EEPROM
writes are
EEPROM
EEPROM
EEPROM
the SEE
bit = 1]
SRAM
SRAM
TYPE
0
—
1
ADDRESS*
User Memory 64 bytes of general-purpose user EEPROM.
Configuration
User Memory 3 bytes of general-purpose user EEPROM.
SLAVE
I/O Control 0
I/O Control 1
I/O Status 0
I/O Status 1
SRAM User
Reserved
Reserved
0
Enable 0
Enable 1
NAME
Pullup
Pullup
A2
A1
Undefined address space for future expansion. Reads and writes to this
space have no effect on the device.
—
Pullup enable for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Set
the corresponding bit to enable the pullup; clear the bit to disable the pullup.
Pullup enable for I/O_8. I/O_8 is the LSB. Only the LSB is used. Set the LSB
bit to enable the pullup on I/O_8; clear the LSB to disable the pullup.
I/O control for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Clearing
the corresponding bit of the register pulls the selected I/O pin low; setting the
bit places the pulldown transistor into a high-impedance state. When the
pulldown is high impedance, the output floats if no pullup/down is connected
to the pin.
I/O control for I/O_8. I/O_8 is the LSB. Only the LSB is used. Clearing the LSB
of the register pulls the I/O_8 pin low; setting the LSB places the pulldown
transistor into a high-impedance state. When the pulldown is high impedance,
the output floats if no pullup/down is connected to the pin.
Configuration register. The LSB is the SEE bit. When set, this bit disables
writes to the EEPROM; writing only affects the shadow SRAM. When set to 0,
both the EEPROM and the shadow SRAM is written.
I/O status for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Writing to
this register has no effect. Read this register to determine the state of the
I/O_0 to I/O_7 pins.
I/O status for I/O_8. I/O_8 is the LSB. Only the LSB is used; the other bits
could be any value when read. Writing to this register has no effect. Read this
register to determine the state of the I/O_8 pin.
6 bytes of general-purpose SRAM.
_____________________________________________________________________
A0
READ/WRITE
R/W
BIT
LSB
I/O Expander Plus Memory
FUNCTION
9-Bit I
2
C Nonvolatile
FACTORY
DEFAULT
00h
00h
00h
FFh
01h
00h
00h
—
—
—
7