MAX7327 Maxim, MAX7327 Datasheet - Page 8

• Manufacturer Part Number: MAX7327
• Description: The MAX7327, a 2-wire serial-interfaced peripheral, features 12 push-pull outputs and four configurable open-drain I/O ports with selectable internal pullups and transition detection
• Manufacturer: Maxim

address can be configured dynamically in the applica-
tion without cycling the device supply.
On initial power-up, the MAX7327 cannot decode the
address inputs AD0 and AD2 fully until the first I
transmission. AD0 and AD2 initially appear to be con-
nected to V+ or GND. This is important because the
address selection is used to determine the power-up
default states of the output ports, I/O port initial logic
state, and whether pullups are enabled. At power-up,
the I
impedance at the I/O pins of every device (master or
slave) connected to the bus, including the MAX7327.
This is guaranteed as part of the I
Therefore, when address inputs AD0 and AD2 are con-
nected to SDA or SCL during power-up, they appear to
be connected to V+. The pullup selection logic uses
AD0 to select whether pullups are enabled for ports P2
and P3, and uses AD2 to select whether pullups are
enabled for ports P4 and P5. The rule is that a logic-
high, SDA, or SCL connection selects the pullups and
sets the logic state to high. A logic-low deselects the
I
Outputs and 4 Open-Drain I/Os
Table 2. MAX7327 Address Map for Outputs O0, O1, O6, O7, and Ports P2–P5
8
CONNECTION
GND
GND
GND
GND
2
AD2
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
V+
V+
V+
V+
_______________________________________________________________________________________
C Port Expander with 12 Push-Pull
2
C SDA and SCL bus interface lines are high
PIN
GND
GND
GND
GND
AD0
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
V+
V+
V+
V+
A6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A5 A4 A3 A2 A1 A0 O7 O6 P5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DEVICE ADDRESS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
C specification.
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
PORTS POWER-UP DEFAULT
2
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
C
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
pullups and sets the default logic state to low. The
pullup configuration is correct on power-up for a stan-
dard I
up to V+ by the external I
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true; for example,
in applications in which there is legitimate bus activity
during power-up. If SDA and SCL are terminated with
pullup resistors to a different supply voltage to the
MAX7327’s supply voltage, and if that pullup supply
rises later than the MAX7327’s supply, then SDA or
SCL may appear at power-up to be connected to GND.
In such applications, use the four address combina-
tions that are selected by connecting address inputs
AD0 and AD2 to V+ or GND (shown in bold in Tables 2
and 3). These selections are guaranteed to be correct
at power-up, independent of SDA and SCL behavior. If
one of the other 12 address combinations is used, an
unexpected combination of pullups might be asserted
until the first I
sarily the MAX7327) is put on the bus.
P4 P3
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
2
C configuration, where SDA or SCL are pulled
P2 O1 O0 O7 O6 P5 P4 P3 P2 O1 O0
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
2
C transmission (to any device, not neces-
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
40kΩ INPUT PULLUPS ENABLED
2
C pullup resistors.
—
—
—
—
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
—
—
—
—
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y